From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3844C3F9F2B; Tue, 25 Aug 2026 10:48:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654921; cv=none; b=CIgRe4xjEOuFOL6lOcO0IL47Wq/SrDoebk3grhe9Qsi1AslpOOyvXtpH/FNw30F6TUbHSnttbsW6gojUJp8WPxHYCyF2GrH6b2lmSBkdqURNuRsXruDt8u1x4/+Ho7InlbFBtavWgY9AUeCqxzVDk5mS/KJNazBe+ZazYX5Q9zQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654921; c=relaxed/simple; bh=16Ku8dX3mO/gcbNRdCYEkNsA7bUoTUoknNALDTnAIUM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=AfN1bNPkQ+i1vxCniDSAsrb7o8hd7pYcXyc33MN/l0WoX2lChrwVIxhla19cxxmwzSd+AMh6SzezRz8pV77OCMGkJe18488tOKazeS4Tu5YsOqNXm3ObpyRULOW9J6vvlHnXNWpki0QtsjHmZHxpadCwvZmIar80hqVa353ke4U= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Ir5hUKw8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Ir5hUKw8" Received: by smtp.kernel.org (Postfix) with ESMTPS id 112B3C4AF12; Tue, 25 Aug 2026 10:48:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1787654921; bh=16Ku8dX3mO/gcbNRdCYEkNsA7bUoTUoknNALDTnAIUM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Ir5hUKw896BzQ5HWKZv1sLJSBbsgEQPbUkb0A4gDm3R8WoxYOMbf1XrwiCgCW+e2/ DlztZnWWaa+W+NmOQz9CqHT4JO/ixxs8JOAqJTlbrsP9pMH2AKP1PI3NiA3pRbj104 t2y82J/hUhKFcp+ydhnsIUDBpWOelBugr/gimbCdhreR5Zh2hvDT+kg3tWe9HaBrHP 4mUO4OpL/Vc4r2p4fxx5cnBj5hSSLLd9abO2Apc9H6N7KsoL8c7BoZBQUMKcNL/i12 +9LFfzfTh8daApDKwET9oC+vTNoRwFlVJw9AJQop+GWisbmOk+nhQC5zpVQq7L9koo SQMLgIR2fg7RA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id EFAA1C61DC2; Tue, 25 Aug 2026 10:48:40 +0000 (UTC) From: Colin Huang via B4 Relay Date: Tue, 25 Aug 2026 18:47:53 +0800 Subject: [PATCH v6 12/12] ARM: dts: aspeed: anacapa: Add SPI flash VCC supply Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260825-anacapa-devlop-phase-devicetree-v6-12-9059a2a279ce@gmail.com> References: <20260825-anacapa-devlop-phase-devicetree-v6-0-9059a2a279ce@gmail.com> In-Reply-To: <20260825-anacapa-devlop-phase-devicetree-v6-0-9059a2a279ce@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, colin.huang2@amd.com, Colin Huang , Rex Fu X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787654905; l=1370; i=u8813345@gmail.com; s=20260202; h=from:subject:message-id; bh=LtEnhYtDTDdaFJ8Tq5vy4icjC937RP4+reqqmwZJfEY=; b=tPqM9x7iBx4Q7kaW/I2LUyeTaNwihkP+gBdmjQ9uMV+pvqC+B1zq5uUw2RQ4umZ7N8hhJCHjl rfrrsJmtiDxA1XkeI9iLyhclx/ysdHZhAwGTk2LJj6kxjjDlz53EkQH X-Developer-Key: i=u8813345@gmail.com; a=ed25519; pk=Zlg0WqpCw4qbswOqamTBTXIchwR/3SnYZpy7rjaGMdQ= X-Endpoint-Received: by B4 Relay for u8813345@gmail.com/20260202 with auth_id=761 X-Original-From: Colin Huang Reply-To: u8813345@gmail.com From: Rex Fu Specify the 3.3 V auxiliary rail as the SPI flash VCC supply to avoid using the dummy regulator during device initialization. Signed-off-by: Rex Fu Signed-off-by: Colin Huang --- .../aspeed/aspeed-bmc-facebook-anacapa-evt2.dts | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts index c36519a601a9..ecb1c86f9e90 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts @@ -6,6 +6,14 @@ / { compatible = "facebook,anacapa-bmc-evt2", "aspeed,ast2600"; model = "Facebook Anacapa BMC"; + + p3v3_bmc_aux: regulator-p3v3-bmc-aux { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "p3v3_bmc_aux"; + }; }; &{/aliases} { @@ -27,6 +35,23 @@ / { i2c51 = &i2c10mux0ch0; }; +&fmc { + flash@0 { + vcc-supply = <&p3v3_bmc_aux>; + }; + + flash@1 { + vcc-supply = <&p3v3_bmc_aux>; + }; +}; + +// BIOS Flash +&spi2 { + flash@0 { + vcc-supply = <&p3v3_bmc_aux>; + }; +}; + // MB - PDB &i2c8 { i2c-mux@72 { -- 2.34.1