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Nord has a single Gen5-capable QMP PCIe PHY block split into four independently-clocked and independently-resettable ports (A/B/C/D). Firmware selects the active lane topology at boot via a TCSR configuration register, and the same PHY block can appear as a single x16 port, x8+x8, x8+x4+x4, or x8+x4+x2+x2 depending on that mode. This is similar in spirit to the Glymur multi-PHY support already posted, except Nord's PHY registers are programmed by Linux rather than by firmware, so this series adds the PLL, TXRXZ, PCS and PCS-lane init tables along with the power-up/power-down/soft-reset sequencing needed to bring each port up. The series also documents and wires up the qcom,nord-pcie compatible (reusing the existing SA8775P PCIe controller binding), and adds a CORE_CLK_CGC_DIS/AUX_PWR_DET workaround required to avoid a timing convergence issue in the PCIe power domain. Signed-off-by: Krishna Chaitanya Chundru --- To: Vinod Koul To: Neil Armstrong To: Rob Herring To: Krzysztof Kozlowski To: Conor Dooley To: Chaitanya Chundru To: Lorenzo Pieralisi To: Krzysztof Wilczyński To: Manivannan Sadhasivam To: Bjorn Helgaas To: Bjorn Andersson To: Maxime Chevallier To: Philipp Zabel Cc: linux-arm-msm@vger.kernel.org Cc: linux-phy@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org --- Krishna Chaitanya Chundru (4): dt-bindings: phy: qcom: add Nord QMP PCIe PHY binding dt-bindings: pci: qcom: add Nord PCIe controller compatible PCI: qcom: Add CGC disable workaround for Nord PCIe phy: qcom: qmp-pcie: Add Nord Gen5x16 PCIe multi-PHY support .../devicetree/bindings/pci/qcom,pcie-sa8775p.yaml | 1 + .../bindings/phy/qcom,nord-qmp-pcie-phy.yaml | 276 +++++ drivers/pci/controller/dwc/pcie-qcom.c | 16 + drivers/phy/qualcomm/phy-qcom-qmp-pcie-multiphy.c | 1077 +++++++++++++++++++- drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6_40.h | 56 + drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_40.h | 14 + .../qualcomm/phy-qcom-qmp-qserdes-com-pcie-v6_40.h | 94 ++ .../phy-qcom-qmp-qserdes-txrxz-pcie-v6_40.h | 194 ++++ 8 files changed, 1688 insertions(+), 40 deletions(-) --- base-commit: c76bb6ed13d3c7dcd1ab3b248299c5a6f1460ec4 change-id: 20260810-nord-461809f1d5ae Best regards, -- Krishna Chaitanya Chundru