From: Larisa Grigore <larisa.grigore@oss.nxp.com>
To: Larisa Grigore <larisa.grigore@oss.nxp.com>,
NXP S32 Linux Team <s32@nxp.com>,
Alim Akhtar <alim.akhtar@samsung.com>,
Avri Altman <avri.altman@sandisk.com>,
Bart Van Assche <bvanassche@acm.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Frank Li <Frank.Li@nxp.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
"James E . J . Bottomley" <James.Bottomley@HansenPartnership.com>,
"Martin K . Petersen" <martin.petersen@oracle.com>,
Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>,
Ajay Neeli <ajay.neeli@amd.com>,
Manivannan Sadhasivam <mani@kernel.org>,
Pedro Sousa <pedrom.sousa@synopsys.com>,
clizzi@redhat.com, aruizrui@redhat.com, eballetb@redhat.com,
echanude@redhat.com
Cc: linux-scsi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org
Subject: [PATCH 05/10] scsi: ufs: dwc: Export common clock divider and link status helpers
Date: Wed, 26 Aug 2026 15:40:43 +0200 [thread overview]
Message-ID: <20260826134048.854748-6-larisa.grigore@oss.nxp.com> (raw)
In-Reply-To: <20260826134048.854748-1-larisa.grigore@oss.nxp.com>
Make ufshcd_dwc_program_clk_div() and ufshcd_dwc_link_is_up() available to
DWC-based platform glue drivers. These helpers are needed by platform
drivers that must program the controller HCLK divider and verify link state
during their vendor-specific initialization flows.
Signed-off-by: Larisa Grigore <larisa.grigore@oss.nxp.com>
---
drivers/ufs/host/ufshcd-dwc.c | 6 ++++--
drivers/ufs/host/ufshcd-dwc.h | 2 ++
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/ufs/host/ufshcd-dwc.c b/drivers/ufs/host/ufshcd-dwc.c
index 45920793d1a8..4a689d211e81 100644
--- a/drivers/ufs/host/ufshcd-dwc.c
+++ b/drivers/ufs/host/ufshcd-dwc.c
@@ -39,10 +39,11 @@ EXPORT_SYMBOL(ufshcd_dwc_dme_set_attrs);
* @divider_val: clock divider value to be programmed
*
*/
-static void ufshcd_dwc_program_clk_div(struct ufs_hba *hba, u32 divider_val)
+void ufshcd_dwc_program_clk_div(struct ufs_hba *hba, u32 divider_val)
{
ufshcd_writel(hba, divider_val, DWC_UFS_REG_HCLKDIV);
}
+EXPORT_SYMBOL(ufshcd_dwc_program_clk_div);
/**
* ufshcd_dwc_link_is_up() - check if link is up.
@@ -50,7 +51,7 @@ static void ufshcd_dwc_program_clk_div(struct ufs_hba *hba, u32 divider_val)
*
* Return: 0 on success, non-zero value on failure.
*/
-static int ufshcd_dwc_link_is_up(struct ufs_hba *hba)
+int ufshcd_dwc_link_is_up(struct ufs_hba *hba)
{
int dme_result = 0;
@@ -63,6 +64,7 @@ static int ufshcd_dwc_link_is_up(struct ufs_hba *hba)
return 1;
}
+EXPORT_SYMBOL(ufshcd_dwc_link_is_up);
/**
* ufshcd_dwc_connection_setup() - configure unipro attributes.
diff --git a/drivers/ufs/host/ufshcd-dwc.h b/drivers/ufs/host/ufshcd-dwc.h
index d8673cd54d4c..53b523ef59df 100644
--- a/drivers/ufs/host/ufshcd-dwc.h
+++ b/drivers/ufs/host/ufshcd-dwc.h
@@ -47,4 +47,6 @@ int ufshcd_dwc_dme_set_attrs(struct ufs_hba *hba,
const struct ufshcd_dme_attr_val *v, int n);
int ufshcd_dwc_phy_reg_write(struct ufs_hba *hba, u32 addr, u32 val);
int ufshcd_dwc_phy_reg_read(struct ufs_hba *hba, u32 addr, u32 *val);
+int ufshcd_dwc_link_is_up(struct ufs_hba *hba);
+void ufshcd_dwc_program_clk_div(struct ufs_hba *hba, u32 divider_val);
#endif /* End of Header */
--
2.43.0
next prev parent reply other threads:[~2026-08-26 13:41 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-26 13:40 [PATCH 00/10] Add S32N79RDB UFS support Larisa Grigore
2026-08-26 13:40 ` [PATCH 01/10] ufs: unipro: Move Tx/Rx FSM state definitions to unipro.h Larisa Grigore
2026-08-26 15:05 ` Frank Li
2026-08-27 13:59 ` Larisa Ileana Grigore
2026-08-26 13:40 ` [PATCH 02/10] ufs: unipro: Add TX/RX FSM state attributes Larisa Grigore
2026-08-26 15:09 ` Frank Li
2026-08-26 13:40 ` [PATCH 03/10] ufs: host: Add common Hibern8 TX FSM polling helper Larisa Grigore
2026-08-26 15:17 ` Frank Li
2026-08-26 15:33 ` Bart Van Assche
2026-08-27 14:03 ` Larisa Ileana Grigore
2026-08-27 9:14 ` Bough Chen
2026-08-27 14:10 ` Larisa Ileana Grigore
2026-08-27 15:00 ` Stanley Jhu
2026-08-26 13:40 ` [PATCH 04/10] scsi: ufs: Move Versal2 M-PHY CREG access helpers into ufshcd-dwc Larisa Grigore
2026-08-26 15:20 ` Frank Li
2026-08-27 14:11 ` Larisa Ileana Grigore
2026-08-26 15:36 ` Bart Van Assche
2026-08-27 14:13 ` Larisa Ileana Grigore
2026-08-27 10:47 ` Bough Chen
2026-08-26 13:40 ` Larisa Grigore [this message]
2026-08-26 15:22 ` [PATCH 05/10] scsi: ufs: dwc: Export common clock divider and link status helpers Frank Li
2026-08-26 13:40 ` [PATCH 06/10] dt-bindings: ufs: Add compatibles for S32N79 Host Controller platform driver Larisa Grigore
2026-08-26 14:35 ` Frank Li
2026-08-26 15:57 ` Conor Dooley
2026-08-27 14:37 ` Larisa Ileana Grigore
2026-08-27 14:36 ` Larisa Ileana Grigore
2026-08-27 14:45 ` Frank Li
2026-08-27 15:09 ` Larisa Ileana Grigore
2026-08-26 13:40 ` [PATCH 07/10] scsi: ufs: Add NXP S32N79 UFS host controller driver Larisa Grigore
2026-08-26 14:01 ` sashiko-bot
2026-08-26 15:49 ` Frank Li
2026-08-27 14:44 ` Larisa Ileana Grigore
2026-08-26 13:40 ` [PATCH 08/10] arm64: dts: freescale: s32n79: Add UFS host controller Larisa Grigore
2026-08-26 13:40 ` [PATCH 09/10] arm64: dts: freescale: s32n79-rdb: Enable UFS Larisa Grigore
2026-08-26 13:40 ` [PATCH 10/10] MAINTAINERS: Add NXP S32N7 UFS host controller entry Larisa Grigore
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