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Fri, 28 Aug 2026 22:25:55 -0700 (PDT) Received: from remote-01 ([45.85.105.214]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c255ee75a36sm163750666b.28.2026.08.28.22.25.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Aug 2026 22:25:54 -0700 (PDT) From: Aleksei Sviridkin To: netdev@vger.kernel.org Cc: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Aleksei Sviridkin Subject: [RFC PATCH net-next 1/9] dt-bindings: net: add Airoha EN8811H PHY MCU Date: Sat, 29 Aug 2026 05:25:38 +0000 Message-ID: <20260829052546.1152446-2-f@lex.la> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260829052546.1152446-1-f@lex.la> References: <20260829052546.1152446-1-f@lex.la> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The EN8811H answers its PHY ID from power-on, but a link is only possible once its MD32 MCU runs firmware that the host loads over MDIO into volatile RAM. On systems that keep the firmware files in a filesystem, the files arrive long after the MDIO bus was scanned, and the PHY node alone cannot express that gap. Describe the MCU as an MDIO device of its own, with the PHY node on a child bus underneath it. The device downloads the firmware when the files appear, or adopts firmware the bootloader left running, and registers the child bus only then, so the PHY never becomes visible before the chip can serve it. The reset line belongs to this node, not to the PHY node: firmware lives in volatile RAM, so reset may be asserted only while the MCU is not executing it. On a PHY node the line would be pulsed by every phy_detach() and wipe the running firmware. Assisted-by: LLM Signed-off-by: Aleksei Sviridkin --- .../bindings/net/airoha,en8811h-mcu.yaml | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/airoha,en8811h-mcu.yaml diff --git a/Documentation/devicetree/bindings/net/airoha,en8811h-mcu.yaml b/Documentation/devicetree/bindings/net/airoha,en8811h-mcu.yaml new file mode 100644 index 000000000000..b51a14a3b7b5 --- /dev/null +++ b/Documentation/devicetree/bindings/net/airoha,en8811h-mcu.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/airoha,en8811h-mcu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha EN8811H PHY MCU + +maintainers: + - Aleksei Sviridkin + +description: | + The Airoha EN8811H 2.5G PHY is driven by an MD32 MCU that executes + firmware loaded over MDIO into volatile RAM. Until that firmware runs, + the chip answers its PHY ID but cannot bring up a link, and the + firmware files may live on a filesystem that is not yet mounted when + the MDIO bus is scanned. + + This node describes the MCU as an MDIO device in its own right. The + driver downloads the firmware once the files become available (or + detects firmware already left running by the bootloader) and only + then registers the child MDIO bus, so the PHY node below never + becomes visible before the chip is able to serve it. + + The reset line is owned by this node rather than by the PHY node: + the MD32 keeps its firmware only in volatile RAM, so the reset may + be asserted only while the MCU is not executing firmware. A PHY-node + reset would be pulsed by phy_detach() on every unbind and wipe the + running firmware. + +properties: + compatible: + const: airoha,en8811h-mcu + + reg: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + reset-assert-us: true + + reset-deassert-us: true + + mdio: + $ref: mdio.yaml# + unevaluatedProperties: false + description: + The child bus holding the PHY itself, at the same address the + chip answers on the parent bus. + +required: + - compatible + - reg + - mdio + +additionalProperties: false + +examples: + - | + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy-mcu@d { + compatible = "airoha,en8811h-mcu"; + reg = <0xd>; + reset-gpios = <&pio 14 1>; + reset-assert-us = <10000>; + reset-deassert-us = <20000>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@d { + compatible = "ethernet-phy-id03a2.a411"; + reg = <0xd>; + interrupts-extended = <&pio 15 8>; + }; + }; + }; + }; -- 2.53.0