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Sat, 29 Aug 2026 08:19:59 -0700 (PDT) Received: from localhost.localdomain ([193.160.247.68]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49ccea6b814sm38959855e9.0.2026.08.29.08.19.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 29 Aug 2026 08:19:59 -0700 (PDT) From: Andrea Pesaresi To: Matthias Brugger , AngeloGioacchino Del Regno Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sam Shih , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH] arm64: dts: mediatek: mt7986: correct timer frequency Date: Sat, 29 Aug 2026 17:19:55 +0200 Message-ID: <20260829151955.3661893-1-andreapesaresi82@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The MT7986 architected timer runs at 12,986,200 Hz rather than 13 MHz. Firmware reports 13 MHz through CNTFRQ_EL0, causing the system clock to run slow by about 1062 ppm. This exceeds the kernel's 500 ppm NTP correction limit and leaves clock discipline saturated. The corrected rate comes from MediaTek's downstream OpenWrt feed, where it is applied to both MT7986A and MT7986B. Since upstream mt7986b.dtsi includes mt7986a.dtsi, add it once to the common timer node so the architected timer driver uses the actual counter rate. Fixes: 50137c150f5f ("arm64: dts: mediatek: add basic mt7986 support") Cc: stable@vger.kernel.org Link: https://github.com/mediatek/mtk-openwrt-feeds/commit/6a4c41c41410cd5042ad10c39da6593ba036283c Link: https://github.com/openwrt/openwrt/issues/24789 Signed-off-by: Andrea Pesaresi --- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 9ebc19610..318639a7c 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -657,6 +657,7 @@ cpu_trip_active_low: active-low { timer { compatible = "arm,armv8-timer"; interrupt-parent = <&gic>; + clock-frequency = <12986200>; interrupts = , , , base-commit: cf72cbb39da84b6f02f90c07f33b102fc10b16f0 -- 2.43.0