From: Jiaxing Hu <gahing@gahingwoo.com>
To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org,
will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org,
p.zabel@pengutronix.de, ogabbay@kernel.org,
zhangqing@rock-chips.com
Cc: royalnet026@gmail.com, u.kleine-koenig@baylibre.com,
chaoyi.chen@rock-chips.com, diederik@cknow-tech.com,
alchark@flipper.net, dri-devel@lists.freedesktop.org,
linux-rockchip@lists.infradead.org, iommu@lists.linux.dev,
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Jiaxing Hu <gahing@gahingwoo.com>,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v11 07/14] dt-bindings: power: rockchip: allow resets in a power domain node
Date: Mon, 31 Aug 2026 20:19:49 +1200 [thread overview]
Message-ID: <20260831081956.84871-8-gahing@gahingwoo.com> (raw)
In-Reply-To: <20260831081956.84871-1-gahing@gahingwoo.com>
Some domains do not come up in a usable state on their own and need
their resets cycled once power is on. The RK3576 NPU domains are one
case: without it the first access after power-on takes an async SError.
Signed-off-by: Jiaxing Hu <gahing@gahingwoo.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
.../bindings/power/rockchip,power-controller.yaml | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
index b41db576f..83741f048 100644
--- a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
+++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
@@ -136,6 +136,13 @@ $defs:
A number of phandles to clocks that need to be enabled
while power domain switches state.
+ resets:
+ maxItems: 1
+ description:
+ A phandle to a reset that needs to be cycled once the power domain has
+ been switched on, for domains whose logic does not come up in a usable
+ state by itself.
+
domain-supply:
description: domain regulator supply.
@@ -216,6 +223,7 @@ examples:
reg = <RK3399_PD_IEP>;
clocks = <&cru ACLK_IEP>,
<&cru HCLK_IEP>;
+ resets = <&cru SRST_A_IEP>;
pm_qos = <&qos_iep>;
#power-domain-cells = <0>;
};
--
2.43.0
next prev parent reply other threads:[~2026-08-31 8:21 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-31 8:19 [PATCH v11 00/14] accel/rocket: RK3576 NPU (RKNN) enablement Jiaxing Hu
2026-08-31 8:19 ` [PATCH v11 01/14] accel/rocket: request the core clocks by name Jiaxing Hu
2026-08-31 8:36 ` sashiko-bot
2026-08-31 8:19 ` [PATCH v11 02/14] accel/rocket: take the completion register writes under job_lock Jiaxing Hu
2026-08-31 8:36 ` sashiko-bot
2026-08-31 8:19 ` [PATCH v11 03/14] accel/rocket: wait for a running IRQ handler before resetting a core Jiaxing Hu
2026-08-31 8:37 ` sashiko-bot
2026-08-31 8:19 ` [PATCH v11 04/14] accel/rocket: let the core suspend after a reset Jiaxing Hu
2026-08-31 8:49 ` sashiko-bot
2026-08-31 8:19 ` [PATCH v11 05/14] accel/rocket: factor the completion tail out of the IRQ handler Jiaxing Hu
2026-08-31 8:52 ` sashiko-bot
2026-08-31 8:19 ` [PATCH v11 06/14] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Jiaxing Hu
2026-08-31 8:19 ` Jiaxing Hu [this message]
2026-08-31 8:19 ` [PATCH v11 08/14] dt-bindings: iommu: rockchip: describe the RK3576 NPU MMU Jiaxing Hu
2026-08-31 8:19 ` [PATCH v11 09/14] pmdomain/rockchip: add optional per-domain power-on settle delay Jiaxing Hu
2026-08-31 8:19 ` [PATCH v11 10/14] pmdomain/rockchip: cycle optional power-domain resets on power-on Jiaxing Hu
2026-08-31 9:05 ` sashiko-bot
2026-08-31 8:19 ` [PATCH v11 11/14] accel/rocket: select the per-core clock and reset counts from match data Jiaxing Hu
2026-08-31 9:04 ` sashiko-bot
2026-08-31 8:19 ` [PATCH v11 12/14] accel/rocket: add RK3576 NPU (RKNN) support Jiaxing Hu
2026-08-31 9:11 ` sashiko-bot
2026-08-31 8:19 ` [PATCH v11 13/14] arm64: dts: rockchip: rk3576: add NPU (RKNN) nodes Jiaxing Hu
2026-08-31 9:16 ` sashiko-bot
2026-08-31 8:19 ` [PATCH v11 14/14] arm64: dts: rockchip: rk3576-rock-4d: enable NPU Jiaxing Hu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260831081956.84871-8-gahing@gahingwoo.com \
--to=gahing@gahingwoo.com \
--cc=alchark@flipper.net \
--cc=chaoyi.chen@rock-chips.com \
--cc=conor+dt@kernel.org \
--cc=conor.dooley@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=diederik@cknow-tech.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=heiko@sntech.de \
--cc=iommu@lists.linux.dev \
--cc=joro@8bytes.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=ogabbay@kernel.org \
--cc=p.zabel@pengutronix.de \
--cc=robh@kernel.org \
--cc=robin.murphy@arm.com \
--cc=royalnet026@gmail.com \
--cc=tomeu@tomeuvizoso.net \
--cc=u.kleine-koenig@baylibre.com \
--cc=ulfh@kernel.org \
--cc=will@kernel.org \
--cc=zhangqing@rock-chips.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox