From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 422C347D93E; Tue, 1 Sep 2026 12:15:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788264943; cv=none; b=UeszLHeO9pr5iTjE0egv7hrtW8qMGSHokjlTq/R7nseupHdCMe5C+IBfVT5cIDbLdK/NNTfeQ1Nhw/lHyigHFCusq1UkrzTP3BrhcHSlrqL3/lZp6P1a8Gb26CLoogQIF3DwhqtGVmxSz5gy0TZ4lF1cr1ZxTw/mPT8Ot3Nd/SU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788264943; c=relaxed/simple; bh=QXCrvztWFgYMqLyTHwJDILyJy7opN8pri3juktQ5n3k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hBb3PSGHP7LcyQGcMmGY459hW1r2GoHyEcKV9QHIyChXkc+QxaN1v5RDDFypjK9f6qWXS4ktoyOl7nor5l8nK0Uynn0LdAjgBQGDQXjl0ubrWkBrAj/zY7N6M3/vii7kPCgEjM54eRwPuMTQ8L0QTeEcLEAd+cpnNf3G49IrHm8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=gNlQ32IM; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gNlQ32IM" Received: by smtp.kernel.org (Postfix) with ESMTPS id 0C5DBC2BCFA; Tue, 1 Sep 2026 12:15:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788264943; bh=QXCrvztWFgYMqLyTHwJDILyJy7opN8pri3juktQ5n3k=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=gNlQ32IMyvX/TMWmTXfWJsxFgyZ2Y61KewMTlLXoZfaoDnwysmzQQi/L30IfDatRo 7tE8WKOGtVmv56ozUVJEXUhjFJp2Pl8FgPjlO3MZK+SUtfPUlc+MdPM6mF1te7XBUu CAsMSbXbZhHoAI+4s6d7tOnCYEAtWuZTeiXv1fnRFg8sGYiW2D9EqcM4+gST5Rfr49 qN0e9LbwvvxfPTeffRKm+0RixXGoIznagsuvkmfehdHtq6onyzq9xEKwqg1uo0nuH7 P0wuU2uWcxU17HxShhrK2pDzLqHwHVdg1vptqk/tE1DpJCsSzFKsZbk1/n/ccI5GQ6 QJ0pvhIPpPDgQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF1E9C624C6; Tue, 1 Sep 2026 12:15:42 +0000 (UTC) From: Colin Huang via B4 Relay Date: Tue, 01 Sep 2026 20:15:22 +0800 Subject: [PATCH v7 07/11] ARM: dts: aspeed: anacapa: Enable MCTP and FRU for NIC Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260901-anacapa-devlop-phase-devicetree-v7-7-0bd71d2e0105@gmail.com> References: <20260901-anacapa-devlop-phase-devicetree-v7-0-0bd71d2e0105@gmail.com> In-Reply-To: <20260901-anacapa-devlop-phase-devicetree-v7-0-0bd71d2e0105@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Ryan Chen , Billy Tsai Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, colin.huang2@amd.com, Colin Huang , Andy Chung X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788264931; l=3263; i=u8813345@gmail.com; s=20260202; h=from:subject:message-id; bh=IMTHRnionsGkkMqXg9dauLUi9styDROAZ5JcOrMpvv0=; b=L/gFUmw2dG1/OG7QaiRmMCEbZ/gel0F8X9wCZxtcd7OD3SBsNkplhsWYlO4eFSakfHlW1LKY3 CHcN5eQT0mkAZ6rwD4dmLFB0suG9d3kK7x0SWXLZnMTVPP43oDmmqzP X-Developer-Key: i=u8813345@gmail.com; a=ed25519; pk=Zlg0WqpCw4qbswOqamTBTXIchwR/3SnYZpy7rjaGMdQ= X-Endpoint-Received: by B4 Relay for u8813345@gmail.com/20260202 with auth_id=761 X-Original-From: Colin Huang Reply-To: u8813345@gmail.com From: Andy Chung Add the mctp-controller property to enable frontend NIC management via PLDM over MCTP. Also add EEPROM device for NIC FRU and reorder the I2C virtual bus index accroding to the system silkscreen index. Signed-off-by: Andy Chung --- .../aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi | 137 +++++++++++++++++++++ 1 file changed, 137 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi index 83b3b99ceccb..c0b2976ad9e9 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi @@ -3,6 +3,25 @@ /dts-v1/; #include "aspeed-bmc-facebook-anacapa-evt1.dtsi" +&{/aliases} { + i2c36 = &i2c11mux0ch5; + i2c37 = &i2c11mux0ch6; + i2c38 = &i2c11mux0ch7; + i2c39 = &i2c11mux0ch0; + i2c40 = &i2c11mux0ch1; + i2c41 = &i2c11mux0ch2; + i2c42 = &i2c11mux0ch3; + i2c43 = &i2c11mux0ch4; + i2c44 = &i2c10mux0ch1; + i2c45 = &i2c10mux0ch2; + i2c46 = &i2c10mux0ch3; + i2c47 = &i2c10mux0ch4; + i2c48 = &i2c10mux0ch5; + i2c49 = &i2c10mux0ch6; + i2c50 = &i2c10mux0ch7; + i2c51 = &i2c10mux0ch0; +}; + // MB - PDB &i2c8 { i2c-mux@72 { @@ -51,6 +70,124 @@ eeprom@51 { }; }; +// R Bridge Board +&i2c10 { + multi-master; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + i2c-mux@71 { + /delete-property/ i2c-mux-idle-disconnect; + + i2c10mux0ch1: i2c@1 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c10mux0ch2: i2c@2 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c10mux0ch3: i2c@3 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c10mux0ch4: i2c@4 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + }; +}; + +// L Bridge Board +&i2c11 { + multi-master; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + i2c-mux@71 { + /delete-property/ i2c-mux-idle-disconnect; + + i2c11mux0ch0: i2c@0 { + mctp-controller; + // FE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c11mux0ch1: i2c@1 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c11mux0ch2: i2c@2 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c11mux0ch3: i2c@3 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c11mux0ch4: i2c@4 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + }; +}; + // MB &i2c13 { i2c-mux@70 { -- 2.34.1