From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D31143D4E2; Tue, 1 Sep 2026 15:39:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788277186; cv=none; b=tr17jWxo5AfrtJKUKWA3KLeX/HwO7R2l+gxuHek3WPqZQXBV6yNKXOog2eMCwGuOnlCh6KTESuoBmpxFnhSfQjKUJtuaYmqo06N+qKkxi++VHRZpi1FcyBd9j/TpcwHlUNMJk5qFMhF/lcfDwEgwpZR+UalaYASj3jM5pZGrRs8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788277186; c=relaxed/simple; bh=ApdwnCzobRfo0Y67O3ndyE38GHA8Ig2xaDPMHWPzC2c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FiEUMQHzWYdQMeDmlbrK6vWPtxV45JzPrnEvh2A15EJ6tdSGfGfN1VtoQi42gL3EaL1acUKFN0Pw+bDiKa2s+wDPzfa+RyT39lyQgF4/hVuVYtgXcPoyOe/JjiluZxJPenv5Ot1OejquGDrg9nKhTZ+u/cfxK6LDu53m6L/Sfm8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=gOlE0ET4; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="gOlE0ET4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1788277182; bh=ApdwnCzobRfo0Y67O3ndyE38GHA8Ig2xaDPMHWPzC2c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=gOlE0ET4kVAC0YT6OwbExKHrHg1i/gskuiSvYndU18GzQTclQzr0oTGU9otznOiJo 5KReBRfk4l1bL5ZUU3gbXly5v1RAQLzH9kQvGwYgfDtI+kFKPHAiGACfNFFm7jgbsq 6+3qxzgX24m3tcrxm/e648qQm21QJeTXqOqrcoRcCN4O4FVljY2LglSKOr8koJirEw A2zyiLL6eogOuFRm+I0P/qKC8Dx6L0nQ1JxjH3cw3GluEXIEtOvdNu95E6LyIyC6Ca HKGPyS92TJ0j2abpeqQTp5sqA24s6wQTz7lS46dkclHvTh99JSjZPj8Bg+pwuK562x ye4XSvHcFXJJw== Received: from yukiji.home (unknown [100.64.0.131]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laeyraud) by bali.collaboradmins.com (Postfix) with ESMTPSA id 8A9F317E0CAB; Tue, 01 Sep 2026 17:39:41 +0200 (CEST) From: Louis-Alexis Eyraud Date: Tue, 01 Sep 2026 17:39:04 +0200 Subject: [PATCH v11 16/24] scsi: ufs: mediatek: Rework _ufs_mtk_clk_scale error paths Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260901-mt8196-ufs-v11-16-dbd007704490@collabora.com> References: <20260901-mt8196-ufs-v11-0-dbd007704490@collabora.com> In-Reply-To: <20260901-mt8196-ufs-v11-0-dbd007704490@collabora.com> To: Chunfeng Yun , Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Peter Wang , Chaotian Jing , Alim Akhtar , Avri Altman , Bart Van Assche , Stanley Jhu , "James E.J. Bottomley" , Philipp Zabel , Liam Girdwood , Mark Brown , Manivannan Sadhasivam , "Martin K. Petersen" , "Martin K. Petersen" Cc: kernel@collabora.com, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org, Nicolas Frattaroli , Louis-Alexis Eyraud X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788277163; l=3592; i=louisalexis.eyraud@collabora.com; s=20250113; h=from:subject:message-id; bh=Pc2gqg/GCGRewjD6ekTlE11wa6DkwWPlJWUf8cCnK9I=; b=a9yWSfw5d9ACLoxcDVWElCsx8QCrm13x+F7eAylCmTx0gZEV9I7ZL8wGJykiWemdWKp1GWvsl TH6t17Vq7emAF1Z6rvihJQFQnWqAa7pAJDLm10lt4WSWxCa0MjSwku9 X-Developer-Key: i=louisalexis.eyraud@collabora.com; a=ed25519; pk=CHFBDB2Kqh4EHc6JIqFn69GhxJJAzc0Zr4e8QxtumuM= From: Nicolas Frattaroli Errors should be printed at the correct log level. Additionally, it looks like some "goto out"'s were omitted in the scale up case, which looks like a mistake, as the scale down branch of the code does use them. Rework the error messages to make them nicer and at the correct verbosity, and add the missing gotos. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Peter Wang Signed-off-by: Nicolas Frattaroli Signed-off-by: Louis-Alexis Eyraud --- drivers/ufs/host/ufs-mediatek.c | 41 +++++++++++++++++++---------------------- 1 file changed, 19 insertions(+), 22 deletions(-) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index 5d8c02b7a857..43fb5dbb250b 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -2011,16 +2011,16 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up) ret = clk_prepare_enable(clki->clk); if (ret) { - dev_info(hba->dev, - "clk_prepare_enable() fail, ret: %d\n", ret); + dev_err(hba->dev, "%s: Failed to enable clock: %pe\n", __func__, ERR_PTR(ret)); return; } if (clk_fde_scale) { ret = clk_prepare_enable(fde_clki->clk); if (ret) { - dev_info(hba->dev, - "fde clk_prepare_enable() fail, ret: %d\n", ret); + dev_err(hba->dev, "%s: Failed to enable FDE clock: %pe\n", + __func__, ERR_PTR(ret)); + clk_disable_unprepare(clki->clk); return; } } @@ -2029,51 +2029,48 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up) if (clk_bind_vcore) { ret = regulator_set_voltage(reg, volt, INT_MAX); if (ret) { - dev_info(hba->dev, - "Failed to set vcore to %d\n", volt); + dev_err(hba->dev, "Failed to set vcore to %d\n", volt); goto out; } } ret = clk_set_parent(clki->clk, mclk->ufs_sel_max_clki->clk); if (ret) { - dev_info(hba->dev, "Failed to set clk mux, ret = %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set clock mux: %pe\n", + __func__, ERR_PTR(ret)); + goto out; } if (clk_fde_scale) { - ret = clk_set_parent(fde_clki->clk, - mclk->ufs_fde_max_clki->clk); + ret = clk_set_parent(fde_clki->clk, mclk->ufs_fde_max_clki->clk); if (ret) { - dev_info(hba->dev, - "Failed to set fde clk mux, ret = %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set fde clock mux: %pe\n", + __func__, ERR_PTR(ret)); + goto out; } } } else { if (clk_fde_scale) { - ret = clk_set_parent(fde_clki->clk, - mclk->ufs_fde_min_clki->clk); + ret = clk_set_parent(fde_clki->clk, mclk->ufs_fde_min_clki->clk); if (ret) { - dev_info(hba->dev, - "Failed to set fde clk mux, ret = %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set fde clock mux: %pe\n", + __func__, ERR_PTR(ret)); goto out; } } ret = clk_set_parent(clki->clk, mclk->ufs_sel_min_clki->clk); if (ret) { - dev_info(hba->dev, "Failed to set clk mux, ret = %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set clock mux: %pe\n", + __func__, ERR_PTR(ret)); goto out; } if (clk_bind_vcore) { ret = regulator_set_voltage(reg, 0, INT_MAX); if (ret) { - dev_info(hba->dev, - "failed to set vcore to MIN\n"); + dev_err(hba->dev, "%s: Failed to set vcore to minimum: %pe\n", + __func__, ERR_PTR(ret)); } } } -- 2.55.0