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Wed, 2 Sep 2026 21:40:34 +0000 From: Ali Rouhi To: "jiri@resnulli.us" CC: "vadim.fedorenko@linux.dev" , "arkadiusz.kubalewski@intel.com" , "ivecera@redhat.com" , "robh@kernel.org" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , "cjubran@nvidia.com" , "Oleg.Zadorozhnyi@devoxsoftware.com" , "devicetree@vger.kernel.org" , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Ali Rouhi Subject: [PATCH net-next v8 07/15] dpll: sit9531x: add support to get and set priority on input pins Thread-Topic: [PATCH net-next v8 07/15] dpll: sit9531x: add support to get and set priority on input pins Thread-Index: AQHdOyOve1+fEKZOQ06z+rugORS3AQ== Date: Wed, 2 Sep 2026 21:40:34 +0000 Message-ID: <20260902214030.20955-8-arouhi@sitime.com> References: <20260902214030.20955-1-arouhi@sitime.com> In-Reply-To: <20260902214030.20955-1-arouhi@sitime.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=sitime.com; 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From: Oleg Zadorozhnyi =0A= =0A= The priority table is ordered: the slot an input occupies is its=0A= priority, and the device selects the lowest occupied slot whose signal is= =0A= qualified. Getting the priority is therefore a search of the table for=0A= the input, and setting it moves the input to the requested slot.=0A= =0A= An input absent from the table has no priority to report, and the core is= =0A= told so rather than handed a made-up number.=0A= =0A= Signed-off-by: Oleg Zadorozhnyi =0A= Assisted-by: Claude:claude-4-opus [chat]=0A= Signed-off-by: Ali Rouhi =0A= ---=0A= drivers/dpll/sit9531x/core.c | 43 +++++++++++++++++++=0A= drivers/dpll/sit9531x/dpll.c | 80 ++++++++++++++++++++++++++++++++++++=0A= 2 files changed, 123 insertions(+)=0A= =0A= diff --git a/drivers/dpll/sit9531x/core.c b/drivers/dpll/sit9531x/core.c=0A= index f42c41d8a42e..e706f6942f65 100644=0A= --- a/drivers/dpll/sit9531x/core.c=0A= +++ b/drivers/dpll/sit9531x/core.c=0A= @@ -414,6 +414,49 @@ static int sit9531x_prio_prg_commit(struct sit9531x_de= v *sitdev)=0A= return 0;=0A= }=0A= =0A= +/*=0A= + * sit9531x_input_prio_get - read an input's priority slot for a PLL=0A= + * @input_idx: input source in hardware encoding (see=0A= + * sit9531x_input_hw_src())=0A= + * @prio: output slot position (0 =3D highest); set to=0A= + * SIT9531X_PRIO_MAX_SLOTS when the source is not in the table=0A= + *=0A= + * Scans the PLL's 12-slot priority table on Page 1 and returns the=0A= + * highest-priority (lowest-numbered) slot that references the source.=0A= + * This reads the value the chip actually holds rather than a cached=0A= + * default, so pin-get reflects the real hardware priority.=0A= + *=0A= + * Caller must hold sitdev->multiop_lock.=0A= + */=0A= +int sit9531x_input_prio_get(struct sit9531x_dev *sitdev, u8 pll_idx,=0A= + u8 input_idx, u8 *prio)=0A= +{=0A= + u8 val, slot, src;=0A= + int rc;=0A= +=0A= + lockdep_assert_held(&sitdev->multiop_lock);=0A= +=0A= + if (pll_idx >=3D SIT9531X_NUM_PLLS)=0A= + return -EINVAL;=0A= +=0A= + for (slot =3D 0; slot < SIT9531X_PRIO_MAX_SLOTS; slot++) {=0A= + rc =3D sit9531x_read_u8(sitdev,=0A= + sit9531x_prio_reg(pll_idx, slot), &val);=0A= + if (rc)=0A= + return rc;=0A= +=0A= + src =3D sit9531x_prio_slot_get(val, slot);=0A= +=0A= + if (src =3D=3D input_idx) {=0A= + *prio =3D slot;=0A= + return 0;=0A= + }=0A= + }=0A= +=0A= + *prio =3D SIT9531X_PRIO_MAX_SLOTS;=0A= + return 0;=0A= +}=0A= +=0A= /*=0A= * Rebuild a PLL's membership mask from the source codes of its priority= =0A= * table. The mask is what the pin state getters test, so it is refreshed= =0A= diff --git a/drivers/dpll/sit9531x/dpll.c b/drivers/dpll/sit9531x/dpll.c=0A= index 29088707a3e6..67b9fbba9f2e 100644=0A= --- a/drivers/dpll/sit9531x/dpll.c=0A= +++ b/drivers/dpll/sit9531x/dpll.c=0A= @@ -417,10 +417,90 @@ sit9531x_dpll_input_pin_state_on_dpll_set(const struc= t dpll_pin *pin,=0A= return rc;=0A= }=0A= =0A= +/*=0A= + * sit9531x_dpll_input_pin_prio_get - read input pin priority=0A= + *=0A= + * reads the PLL's priority table on Page 1 (via=0A= + * sit9531x_input_prio_get()) and returns the slot the input=0A= + * occupies, so pin-get reports the real hardware priority rather=0A= + * than a software default.=0A= + */=0A= +static int=0A= +sit9531x_dpll_input_pin_prio_get(const struct dpll_pin *pin, void *pin_pri= v,=0A= + const struct dpll_device *dpll, void *dpll_priv,=0A= + u32 *prio, struct netlink_ext_ack *extack)=0A= +{=0A= + struct sit9531x_dpll_pin *dpin =3D pin_priv;=0A= + struct sit9531x_dpll *sitdpll =3D dpll_priv;=0A= + struct sit9531x_dev *sitdev =3D sitdpll->dev;=0A= + u8 slot;=0A= + int rc;=0A= +=0A= + mutex_lock(&sitdev->multiop_lock);=0A= + rc =3D sit9531x_input_prio_get(sitdev, sitdpll->id,=0A= + sit9531x_input_hw_src(dpin->id), &slot);=0A= + mutex_unlock(&sitdev->multiop_lock);=0A= + if (rc)=0A= + return rc;=0A= +=0A= + dpin->prio =3D slot;=0A= + *prio =3D slot;=0A= + return 0;=0A= +}=0A= +=0A= +/*=0A= + * sit9531x_dpll_input_pin_prio_set - set input pin priority=0A= + *=0A= + * writes input priority table on Page 1 via=0A= + * core.c sit9531x_input_prio_set(). Forces holdover during update.=0A= + */=0A= +static int=0A= +sit9531x_dpll_input_pin_prio_set(const struct dpll_pin *pin, void *pin_pri= v,=0A= + const struct dpll_device *dpll, void *dpll_priv,=0A= + u32 prio, struct netlink_ext_ack *extack)=0A= +{=0A= + struct sit9531x_dpll_pin *dpin =3D pin_priv;=0A= + struct sit9531x_dpll *sitdpll =3D dpll_priv;=0A= + struct sit9531x_dev *sitdev =3D sitdpll->dev;=0A= + int rc;=0A= +=0A= + if (dpin->dir !=3D DPLL_PIN_DIRECTION_INPUT) {=0A= + NL_SET_ERR_MSG(extack, "Priority applies only to input pins");=0A= + return -EINVAL;=0A= + }=0A= +=0A= + if (prio >=3D SIT9531X_PRIO_MAX_SLOTS) {=0A= + NL_SET_ERR_MSG(extack, "Priority out of range (0-10)");=0A= + return -EINVAL;=0A= + }=0A= +=0A= + mutex_lock(&sitdev->multiop_lock);=0A= + rc =3D sit9531x_input_prio_set(sitdev, sitdpll->id,=0A= + sit9531x_input_hw_src(dpin->id),=0A= + (u8)prio);=0A= + mutex_unlock(&sitdev->multiop_lock);=0A= +=0A= + if (rc =3D=3D -EINVAL) {=0A= + NL_SET_ERR_MSG(extack,=0A= + "Pin is not a reference of this DPLL; connect it first");=0A= + return rc;=0A= + }=0A= + if (rc) {=0A= + NL_SET_ERR_MSG(extack, "Failed to set input priority");=0A= + return rc;=0A= + }=0A= +=0A= + dpin->prio =3D (u8)prio;=0A= +=0A= + return 0;=0A= +}=0A= +=0A= static const struct dpll_pin_ops sit9531x_dpll_input_pin_ops =3D {=0A= .direction_get =3D sit9531x_dpll_input_pin_direction_get,=0A= .state_on_dpll_get =3D sit9531x_dpll_input_pin_state_on_dpll_get,=0A= .state_on_dpll_set =3D sit9531x_dpll_input_pin_state_on_dpll_set,=0A= + .prio_get =3D sit9531x_dpll_input_pin_prio_get,=0A= + .prio_set =3D sit9531x_dpll_input_pin_prio_set,=0A= /*=0A= * The measurement compares the PLL's running feedback divider with=0A= * its configured one, so it describes the device's own reference=0A= -- =0A= 2.43.0=0A= =0A=