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Thu, 03 Sep 2026 08:38:50 -0700 (PDT) Received: from hu-faisalh-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-86153027951sm81069b3a.40.2026.09.03.08.38.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Sep 2026 08:38:50 -0700 (PDT) From: Faisal Hassan To: Thinh Nguyen , Greg Kroah-Hartman , Mathias Nyman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Wesley Cheng Cc: Sriram Dash , Jack Pham , Krishna Kurapati , Shazad Hussain , linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/7] dt-bindings: usb: Add qcom,sa8255p-dwc3 for firmware-managed resources Date: Thu, 3 Sep 2026 21:08:23 +0530 Message-Id: <20260903153827.3463313-4-faisal.hassan@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260903153827.3463313-1-faisal.hassan@oss.qualcomm.com> References: <20260903153827.3463313-1-faisal.hassan@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: B27EOaTyiQNFJ63j7lej2nTaMwq7d2DN X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTAzMDEzNiBTYWx0ZWRfX0rrhtLaVsw9P 2sLQWw+TyL9Indg0y7MFh8Bls3tTddyJuFnQTgRegi2o87f3y5yYJAR/cu5kAsss6chc6QA+Mcq V+JT1sqi0SpPSz+5EPDBu+S2ce1dmwd7hnfXwhkRTnB16wsAI2z4+A1AGXpyxED7UAuq0N+Uv/G VekJZzGWD0tdQKqd+Gf6d2fGYdBdaoOP9BMrQjgRuE+a+VOL/XNA0mPK7WxZHniQ9luU3FJYVNX E/HmLP2HR2D2yNnpf/8AqLiHbMxhz8jcKkgNRWpMxE0DT8lfMCm/R6dmPLg7WpBEgeRTU0B+Vaq v2vc9AC5ynFpf++f5kXHKLyWwzRZ3h0HHFXS0cF0HB3CLS4r0Dnp8KuJyE8FUd5Obtqlw5pZETb dtReSPgxGxU5Ozruq6TbgJPLvlWqWb08Fa78Q+7pvWU5uUoeku5eZEKmCy6Bed2bWrRtMWbXRXY 6OttbKP3czyS86CUgzQ== X-Authority-Analysis: v=2.4 cv=X8Ji7mTe c=1 sm=1 tr=0 ts=6a99948c cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=HmkRj0nT5UQon3SBszkA:9 a=2VI0MkxyNR6bbpdq8BZq:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTAzMDEzNiBTYWx0ZWRfXwmuyR/2FvwrD 3/8wNbMksCyP54/04XXx7tD8rX1iR23keQqLIrWEt5VBKXoGGVyBOuGxlw4eQxSjK1JDoBHNwSV DghTStLZI7s0butZkeC83p8KXPmCX1c= X-Proofpoint-ORIG-GUID: B27EOaTyiQNFJ63j7lej2nTaMwq7d2DN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-03_04,2026-09-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 phishscore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 adultscore=0 bulkscore=0 clxscore=1011 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609030136 On Qualcomm automotive SoC sa8255p, platform resources like clocks, interconnects, resets, regulators and GDSC are abstracted and managed collectively by firmware. Add a new binding file for firmware-managed USB controllers where access to these resources is exposed as two power domains: - Power domain: Controls power supply (GDSC) to the USB controller - Bus domain: Controls clocks and interconnects for data transfer The binding makes power-domains and power-domain-names properties mandatory for firmware-managed platforms, while excluding the clocks property since clocks are managed through the power domains. Co-developed-by: Sriram Dash Signed-off-by: Sriram Dash Signed-off-by: Faisal Hassan --- .../bindings/usb/qcom,sa8255p-dwc3.yaml | 123 ++++++++++++++++++ 1 file changed, 123 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/qcom,sa8255p-dwc3.yaml diff --git a/Documentation/devicetree/bindings/usb/qcom,sa8255p-dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,sa8255p-dwc3.yaml new file mode 100644 index 000000000000..c6db7bcf4981 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/qcom,sa8255p-dwc3.yaml @@ -0,0 +1,123 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/qcom,sa8255p-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SA8255P USB3 Controller with Firmware-Managed Resources + +maintainers: + - Wesley Cheng + - Faisal Hassan + +description: + USB controller on Qualcomm SA8255P automotive SoC where platform resources + such as clocks, interconnects, resets, regulators and the GDSC are + abstracted and managed collectively by firmware through SCMI (System + Control and Management Interface). + + Access to these firmware-managed resources is exposed as two power + domains, one gating the power supply (GDSC) to the controller, and one + gating the clocks and interconnects used for data transfer. + +properties: + compatible: + const: qcom,sa8255p-dwc3 + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 6 + + interrupt-names: + minItems: 1 + maxItems: 6 + + power-domains: + description: | + Power domains are provided by SCMI (System Control and Management + Interface). See Documentation/devicetree/bindings/firmware/arm,scmi.yaml + for details. + + Exactly two power domains must be specified: + - "power": controls power supply (GDSC) to the USB controller + - "bus": controls clocks and interconnects used for data transfer + minItems: 2 + maxItems: 2 + + power-domain-names: + description: Names for the power domains specified in the power-domains property. + items: + - const: power + - const: bus + + resets: + description: | + Reset provided by SCMI firmware. See + Documentation/devicetree/bindings/firmware/arm,scmi.yaml for details. + maxItems: 1 + + iommus: + maxItems: 1 + + phys: + minItems: 1 + maxItems: 2 + + phy-names: + minItems: 1 + maxItems: 2 + + # Firmware-managed platforms do not use direct clock/interconnect control + clocks: false + clock-names: false + interconnects: false + interconnect-names: false + +required: + - compatible + - reg + - interrupts + - interrupt-names + - power-domains + - power-domain-names + - resets + +allOf: + - $ref: snps,dwc3-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + + usb@a800000 { + compatible = "qcom,sa8255p-dwc3"; + reg = <0x0a800000 0x10000>; + + interrupts-extended = <&intc GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 7 IRQ_TYPE_EDGE_BOTH>, + <&pdc 13 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "dwc_usb3", + "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq", + "ss_phy_irq"; + + power-domains = <&scmi_pd 1>, <&scmi_pd 2>; + power-domain-names = "power", "bus"; + resets = <&scmi_rst 0>; + + iommus = <&apps_smmu 0x0a0 0x0>; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy>; + phy-names = "usb2-phy", "usb3-phy"; + }; +... -- 2.34.1