Re: [PATCH v2 1/3] arm64: dts: socfpga: agilex5: replace clocks reference with clock-frequency for dw-apb-timer

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Replacing 'clocks' with 'clock-frequency' to work around Linux driver initialization ordering is a Devicetree anti-pattern.
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commit bdc3d28e7cc7c5d8502d6fe42848d2feefd3bf47
Author: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>

arm64: dts: socfpga: agilex5: replace clocks reference with clock-frequency for dw-apb-timer

This patch replaces the dynamic clock reference for the Agilex5 timers with a
hardcoded clock frequency. This is done to bypass a driver initialization
ordering issue where the clock manager probes later than the timer.

> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index f54767d1526e1..f5bc37fa85832 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -429,32 +429,28 @@ timer0: timer0@10c03000 {
>  			compatible = "snps,dw-apb-timer";
>  			reg = <0x10c03000 0x100>;
>  			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&clkmgr AGILEX5_L4_SP_CLK>;
> -			clock-names = "timer";
> +			clock-frequency = <100000000>;

[Severity: Medium]
Is it appropriate to encode an OS-specific probe-order workaround directly
into the hardware description?

Devicetree is designed to describe hardware topology rather than provide
workarounds for Linux driver initialization sequences. By replacing the clocks
reference to the Agilex5 clock manager with a hardcoded clock-frequency, the
correct physical clock association is lost.

If the bootloader changes the L4_SP clock rate in the future, wouldn't the
hardcoded 100 MHz value lead to incorrect kernel timekeeping since it no longer
queries the actual clock manager?

[ ... ]

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Sashiko AI review · https://sashiko.dev/#/patchset/cover.1788457041.git.adrian.ho.yin.ng@altera.com?part=1