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a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1788468748; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gY4jc6oJ2GgTXE3O2Y7QZQeifWB7jprimmkiTSgncIE=; b=ByuQDWHmJcBYQWfxPXdJ0gO4vu6SBs70BntRL0VDGbP/MZFtJdiUyNwbX8pbd2alItar0C EcT4HtwaLlIx5IugcYPV9XWBrUivVKoPkQ0VH/pDEzl1xWmnGeZ5aglsgrric8lJWd5U8W 5yPYOQHOR0JmsOrYRbKyNuZox8ypaQVnLcM5jhPdgpCaTgs77bqmBtfec4+VdCQsDG88h/ x0gxrR9q8D3CzxNjMn/AHslgFvcrDVHbximoU80eCJKFv1prUXKWIehmswvtMqNraxv18m MMsXU1RpuPaVDy12cUCoOZTPapXcK+GRX7amVPsDCcwAluTaDgZfWnF/Qpu4Fg== To: linux-pci@vger.kernel.org Cc: Marek Vasut , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Conor Dooley , Geert Uytterhoeven , Koichiro Den , Krzysztof Kozlowski , Lorenzo Pieralisi , Magnus Damm , Manivannan Sadhasivam , Rob Herring , Yoshihiro Shimoda , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 3/6] PCI: rcar-gen4: Add Application/Local register reset control Date: Thu, 3 Sep 2026 22:50:54 +0200 Message-ID: <20260903205153.283553-3-marek.vasut+renesas@mailbox.org> In-Reply-To: <20260903205153.283553-1-marek.vasut+renesas@mailbox.org> References: <20260903205153.283553-1-marek.vasut+renesas@mailbox.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-MBO-RS-ID: f3f55817c555d887afd X-MBO-RS-META: atneuysh73t8sxhx51oun3mfnadmo7sy X-Rspamd-Queue-Id: 4hbWxp1dLqzKmXt The R-Car Gen4 PCIe controller does contain core reset, which puts the controller back into well defined state, but it does also tear down the PCIe link. This is called Application/Local register reset in the documentation. Deassert the core reset after the core clock have been enabled, and assert the core reset in case of error or when shutting down the controller. This also fixes reinitialization failure of the controller, where if the controller driver is unbind and bind again via sysfs attributes, the controller driver will fail to probe the second time because it fails to access the controller DBI, which returns all zeroes unless the core reset is toggled. The following commands trigger this fault on R-Car V4H: $ echo e65d0000.pcie > /sys/bus/platform/drivers/pcie-rcar-gen4/unbind $ echo e65d0000.pcie > /sys/bus/platform/drivers/pcie-rcar-gen4/bind Signed-off-by: Marek Vasut --- Cc: "Krzysztof Wilczyński" Cc: Bjorn Helgaas Cc: Conor Dooley Cc: Geert Uytterhoeven Cc: Koichiro Den Cc: Krzysztof Kozlowski Cc: Lorenzo Pieralisi Cc: Magnus Damm Cc: Manivannan Sadhasivam Cc: Rob Herring Cc: Yoshihiro Shimoda Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org --- drivers/pci/controller/dwc/pcie-rcar-gen4.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4.c b/drivers/pci/controller/dwc/pcie-rcar-gen4.c index f938430644860..ceffaa2e4cf99 100644 --- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c +++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c @@ -197,6 +197,8 @@ static int rcar_gen4_pcie_common_init(struct rcar_gen4_pcie *rcar) return ret; } + reset_control_deassert(dw->core_rsts[DW_PCIE_CORE_RST].rstc); + if (!reset_control_status(dw->core_rsts[DW_PCIE_PWR_RST].rstc)) { reset_control_assert(dw->core_rsts[DW_PCIE_PWR_RST].rstc); /* @@ -247,6 +249,7 @@ static int rcar_gen4_pcie_common_init(struct rcar_gen4_pcie *rcar) return 0; err_unprepare: + reset_control_assert(dw->core_rsts[DW_PCIE_CORE_RST].rstc); clk_bulk_disable_unprepare(DW_PCIE_NUM_CORE_CLKS, dw->core_clks); return ret; @@ -257,6 +260,7 @@ static void rcar_gen4_pcie_common_deinit(struct rcar_gen4_pcie *rcar) struct dw_pcie *dw = &rcar->dw; reset_control_assert(dw->core_rsts[DW_PCIE_PWR_RST].rstc); + reset_control_assert(dw->core_rsts[DW_PCIE_CORE_RST].rstc); clk_bulk_disable_unprepare(DW_PCIE_NUM_CORE_CLKS, dw->core_clks); } -- 2.53.0