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smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YMAx2iY0; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YMAx2iY0" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 73BBB1F00A3A; Mon, 7 Sep 2026 09:08:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1788772133; bh=G3iM/ReEV9+vKdb80yT0YD5MukMwqCgjcKzuMZz3vhQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=YMAx2iY0+km6Xi7zooLmytwVH7m/rcIHK5XI8Y8UKQeV6RlqSt0tFnZQ1gPx7qY2S vNH3qMnghiuJHlvnWdLFqea4F7rFEylWvGdI4WB3xe8oR1Rv5+2RvnBJ9UAVqd2kfR x+s1e7EPB5t+6PbYuSlakdbMmBolx44htPQhS3SY1aAuCDZRmDYu/az8ndn/YGctl0 gaJRVxmh25Ks6NPm2gUKJCbj0x+bgDQAEl7SYkKpBGcFSPpH5KDUG3fsOr97kOq2Re K34YofWqwXei6xayENA8lgOwshr4lku6ZscZi2xTOkZ4okb9hej+F0evAlzaf/2Vhm HkvH0u7+ytBmw== Date: Mon, 7 Sep 2026 11:08:49 +0200 From: Krzysztof Kozlowski To: Faisal Hassan Cc: Thinh Nguyen , Greg Kroah-Hartman , Mathias Nyman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Wesley Cheng , Sriram Dash , Jack Pham , Krishna Kurapati , Shazad Hussain , linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 3/7] dt-bindings: usb: Add qcom,sa8255p-dwc3 for firmware-managed resources Message-ID: <20260907-arcane-spicy-parrot-6da5ed@quoll> References: <20260903153827.3463313-1-faisal.hassan@oss.qualcomm.com> <20260903153827.3463313-4-faisal.hassan@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260903153827.3463313-4-faisal.hassan@oss.qualcomm.com> On Thu, Sep 03, 2026 at 09:08:23PM +0530, Faisal Hassan wrote: > On Qualcomm automotive SoC sa8255p, platform resources like clocks, > interconnects, resets, regulators and GDSC are abstracted and managed > collectively by firmware. > > Add a new binding file for firmware-managed USB controllers where > access to these resources is exposed as two power domains: > - Power domain: Controls power supply (GDSC) to the USB controller > - Bus domain: Controls clocks and interconnects for data transfer > > The binding makes power-domains and power-domain-names properties mandatory > for firmware-managed platforms, while excluding the clocks property since > clocks are managed through the power domains. > > Co-developed-by: Sriram Dash > Signed-off-by: Sriram Dash > Signed-off-by: Faisal Hassan > --- > .../bindings/usb/qcom,sa8255p-dwc3.yaml | 123 ++++++++++++++++++ > 1 file changed, 123 insertions(+) > create mode 100644 Documentation/devicetree/bindings/usb/qcom,sa8255p-dwc3.yaml > > diff --git a/Documentation/devicetree/bindings/usb/qcom,sa8255p-dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,sa8255p-dwc3.yaml > new file mode 100644 > index 000000000000..c6db7bcf4981 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/qcom,sa8255p-dwc3.yaml > @@ -0,0 +1,123 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/usb/qcom,sa8255p-dwc3.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm SA8255P USB3 Controller with Firmware-Managed Resources > + > +maintainers: > + - Wesley Cheng > + - Faisal Hassan > + > +description: > + USB controller on Qualcomm SA8255P automotive SoC where platform resources > + such as clocks, interconnects, resets, regulators and the GDSC are > + abstracted and managed collectively by firmware through SCMI (System > + Control and Management Interface). > + > + Access to these firmware-managed resources is exposed as two power > + domains, one gating the power supply (GDSC) to the controller, and one > + gating the clocks and interconnects used for data transfer. > + > +properties: > + compatible: > + const: qcom,sa8255p-dwc3 > + > + reg: > + maxItems: 1 > + > + interrupts: > + minItems: 1 > + maxItems: 6 Why is this flexible? > + > + interrupt-names: > + minItems: 1 > + maxItems: 6 Why is this flexible even more, allowing completely random names? > + > + power-domains: > + description: | > + Power domains are provided by SCMI (System Control and Management > + Interface). See Documentation/devicetree/bindings/firmware/arm,scmi.yaml > + for details. > + > + Exactly two power domains must be specified: > + - "power": controls power supply (GDSC) to the USB controller > + - "bus": controls clocks and interconnects used for data transfer Look at other bindings how they do it. I finished here, because you would avoid all above questions if you just copied recently added or reviewed on the list SA8xxx binding. You did not, so basically I expect more of unexpected code, which is pointless to review. Just open existing files... Best regards, Krzysztof