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Reply-To: sashiko-reviews@lists.linux.dev To: "Petko Manolov" Cc: devicetree@vger.kernel.org, conor+dt@kernel.org, robh@kernel.org In-Reply-To: <20260909111513.2259643-4-petko.manolov@konsulko.com> References: <20260909111513.2259643-1-petko.manolov@konsulko.com> <20260909111513.2259643-4-petko.manolov@konsulko.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Date: Wed, 09 Sep 2026 11:25:40 +0000 Message-Id: <20260909112540.7C7F71F00A3E@smtp.kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Thank you for your contribution! Sashiko AI review found 3 potential issue(= s) to consider: - [Low] The 'bank-name' property violates the device tree schema for 'snps,= dw-apb-gpio-port' child nodes. - [Low] Use of deprecated `snps,nr-gpios` property. - [Low] Deprecated explicit `name` property in the memory node. -- commit c5c8260180405203e51bdeb09506abe3c2c76c4d Author: Petko Manolov Add socfpga devicetree for Draeger's M48 board. This commit introduces a new devicetree for the Draeger M48 board based on the Cyclone V SoC. It sets up the necessary nodes for various peripherals including GPIO, GMAC, I2C, and QSPI. > diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48= .dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts > new file mode 100644 > index 0000000000000..6c5a8013d40c7 > --- /dev/null > +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts > @@ -0,0 +1,129 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * (C) Copyright 2020 Draeger and Licensors, info@draeger.com > + */ > +#include "socfpga_cyclone5.dtsi" > + > +/ { > + model =3D "Draeger M48 Cyclone V SoC"; > + compatible =3D "draeger,M48", "altr,socfpga-cyclone5", "altr,socfpga"; > + > + chosen { > + stdout-path =3D "serial0:115200n8"; > + }; > + > + memory@0 { > + name =3D "memory"; [Severity: Low] Is it necessary to explicitly define the name property here? The Devicetree Specification deprecates explicit name properties, as node names are automatically derived from the node identifier. Its inclusion will trigger = dtc warnings during the build. > + device_type =3D "memory"; > + reg =3D <0x0 0x40000000>; > + > + /* 1GB */ > + }; > + > + aliases { [ ... ] > + soc { > + gpio3: gpio@ff202000 { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + compatible =3D "snps,dw-apb-gpio"; > + reg =3D <0xff202000 0x20>; > + status =3D "okay"; > + > + portd: gpio-controller@0 { > + compatible =3D "snps,dw-apb-gpio-port"; > + gpio-controller; > + #gpio-cells =3D <2>; > + snps,nr-gpios =3D <2>; [Severity: Low] Could this use the standard ngpios property instead? The snps,nr-gpios property is explicitly marked as deprecated in the snps,dw-apb-gpio.yaml binding, and using it might trigger validation warnings. > + reg =3D <0>; > + bank-name =3D "SYNC_I"; [Severity: Low] Will this property cause a device tree schema validation failure? The snps,dw-apb-gpio-port binding enforces additionalProperties: false and does not define bank-name. Running make dtbs_check will likely report a warning here. > + }; > + }; > + > + gpio4: gpio@ff202020 { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + compatible =3D "snps,dw-apb-gpio"; > + reg =3D <0xff202020 0x20>; > + status =3D "okay"; > + > + porte: gpio-controller@0 { > + compatible =3D "snps,dw-apb-gpio-port"; > + gpio-controller; > + #gpio-cells =3D <2>; > + snps,nr-gpios =3D <2>; [Severity: Low] Could this also use the standard ngpios property instead, as the snps,nr-gp= ios property is deprecated? > + reg =3D <0>; > + bank-name =3D "SYNC_O"; [Severity: Low] Will this property cause a device tree schema validation failure for the po= rte node? The snps,dw-apb-gpio-port binding does not define bank-name and enfor= ces additionalProperties: false. > + }; > + }; > + }; > +}; --=20 Sashiko AI review =C2=B7 https://sashiko.dev/#/patchset/20260909111513.2259= 643-1-petko.manolov@konsulko.com?part=3D3