From: sashiko-bot@kernel.org
To: "AngeloGioacchino Del Regno" <angelogioacchino.delregno@collabora.com>
Cc: dri-devel@lists.freedesktop.org, vkoul@kernel.org,
neil.armstrong@linaro.org, devicetree@vger.kernel.org,
robh@kernel.org, olteanv@gmail.com,
linux-phy@lists.infradead.org, conor+dt@kernel.org
Subject: Re: [PATCH v4 08/12] phy: phy-mtk-dp: Add support for digital and analog calibration
Date: Thu, 10 Sep 2026 09:35:11 +0000 [thread overview]
Message-ID: <20260910093512.1AF2E1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260910092038.48291-9-angelogioacchino.delregno@collabora.com>
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Medium] Silent ignoring of hardware write failures during PHY initialization.
- [Medium] False positive error logs emitted when optional eFuse calibration data is missing.
- [Low] Unused variables left over from refactoring (`dev` and `ret`).
--
commit 7b4b9550381f2fc0574d6e28361a57bed4016c26
Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
phy: phy-mtk-dp: Add support for digital and analog calibration
This commit adds support for reading DP PHY calibration values from eFuse.
If calibration values are present, they are written to the PHY; otherwise,
the driver falls back to default SoC-specific values. It also adds support
for writing the calibration values for the analog part of the PHY.
> diff --git a/drivers/phy/mediatek/phy-mtk-dp.c b/drivers/phy/mediatek/phy-mtk-dp.c
> index 692049f788332..2f4cf52d922c1 100644
> --- a/drivers/phy/mediatek/phy-mtk-dp.c
> +++ b/drivers/phy/mediatek/phy-mtk-dp.c
[ ... ]
> -static int mtk_dp_phy_init(struct phy *phy)
> +static void mtk_dp_phy_set_digital_drv_params(struct mtk_dp_phy *dp_phy)
> {
> - struct mtk_dp_phy *dp_phy = phy_get_drvdata(phy);
> const struct mtk_dp_phy_pdata *pdata = dp_phy->pdata;
> const u32 reg = pdata->regs_dig_lane[DP_PHYD_LAN_DRIVING_PARAM_0];
> - static const u32 driving_params[] = {
[ ... ]
> - };
> int i, ret;
[Severity: Low]
Is `ret` still needed here? The return checks for regmap bulk writes were
removed below, which appears to leave this variable completely unused.
>
> /*
[ ... ]
> - for (i = 0; i < MTK_DP_PHY_MAX_LANES; i++) {
> - ret = regmap_bulk_write(dp_phy->regmap,
> - pdata->off_dig_lane[i] + reg,
> - driving_params,
> - ARRAY_SIZE(driving_params));
> - if (ret)
> - return ret;
> - };
> + for (i = 0; i < MTK_DP_PHY_MAX_LANES; i++)
> + regmap_bulk_write(dp_phy->regmap, pdata->off_dig_lane[i] + reg,
> + pdata->driving_params,
> + ARRAY_SIZE(pdata->driving_params));
> +}
[Severity: Medium]
Does this code introduce a regression by silently ignoring hardware write
failures during PHY initialization?
Prior to this patch, if regmap_bulk_write() failed, the error was propagated
back to the caller. Now that this has been extracted into a void function,
any hardware or bus errors during these bulk writes will be silently dropped.
> +
> +static int mtk_dp_phy_init(struct phy *phy)
> +{
> + struct mtk_dp_phy *dp_phy = phy_get_drvdata(phy);
> + struct device *dev = &phy->dev;
[Severity: Low]
Is the `dev` variable used anywhere in this function? It appears to be
declared and assigned but never utilized.
> +
> + mtk_dp_phy_set_digital_drv_params(dp_phy);
> + mtk_dp_phy_set_analog_calibration_params(dp_phy);
>
> return 0;
> }
[Severity: Medium]
Does the PHY initialization now unconditionally succeed regardless of
the underlying hardware state?
Because the extracted functions mtk_dp_phy_set_digital_drv_params() and
mtk_dp_phy_set_analog_calibration_params() return void, any failures
during regmap updates will not be caught, and this function will always
improperly return 0 on failure.
[ ... ]
> +static int mtk_dp_phy_get_one_cal_para(struct device *dev, const char *name, u8 max_val)
> +{
> + u8 buf_byte;
> + u16 buf;
> + int ret;
> +
[ ... ]
> + ret = nvmem_cell_read_u8(dev, name, &buf_byte);
> + if (ret)
> + ret = nvmem_cell_read_u16(dev, name, &buf);
> + else
> + buf = buf_byte;
> +
> + if (ret)
> + return dev_err_probe(dev, ret, "Cannot get calibration data for %s\n", name);
[Severity: Medium]
Will this cause false positive error logs on normal boots?
If an NVMEM cell is missing, the nvmem read functions naturally return
-ENOENT. This dev_err_probe() triggers a KERN_ERR log here before returning
the error to the caller.
> +
> + if (buf == 0) {
[ ... ]
> +static int mtk_dp_phy_get_calibration_data(struct mtk_dp_phy *dp_phy)
> +{
[ ... ]
> +end:
> + if (ret < 0) {
> + /*
> + * If any of the calibration values is missing, or if there
> + * is no calibration at all in the eFuses, copy the default
> + * one entirely (as partial values shall not be mixed!)
> + */
> + if (ret == -ENOENT) {
> + dev_info(dev, "Using calibration default values\n");
> + mtk_dp_phy_get_default_cal_data(dp_phy);
> + return 0;
> + }
[Severity: Medium]
Since -ENOENT is explicitly checked and handled gracefully as a benign
fallback here, should we avoid logging it as an error in
mtk_dp_phy_get_one_cal_para() earlier?
Logging an expected missing cell as an error falsely spams the kernel dmesg
with an error trace for boards that legitimately omit calibration data.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260910092038.48291-1-angelogioacchino.delregno@collabora.com?part=8
next prev parent reply other threads:[~2026-09-10 9:35 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-10 9:20 [PATCH v4 00/12] PHY: MediaTek DP PHY refactor and MT8196 eDP AngeloGioacchino Del Regno
2026-09-10 9:20 ` [PATCH v4 01/12] dt-bindings: phy: Document MT8195 and MT8196 DisplayPort PHYs AngeloGioacchino Del Regno
2026-09-10 9:37 ` sashiko-bot
2026-09-10 9:20 ` [PATCH v4 02/12] phy: phy-mtk-dp: Rename regs to regmap in struct mtk_dp_phy AngeloGioacchino Del Regno
2026-09-10 9:20 ` [PATCH v4 03/12] phy: phy-mtk-dp: Allow probing with devicetree match AngeloGioacchino Del Regno
2026-09-10 9:41 ` sashiko-bot
2026-09-10 9:20 ` [PATCH v4 04/12] phy: phy-mtk-dp: Migrate register offsets to SoC specific pdata AngeloGioacchino Del Regno
2026-09-10 9:40 ` sashiko-bot
2026-09-10 9:20 ` [PATCH v4 05/12] phy: phy-mtk-dp: Implement power_on and power_off PHY callbacks AngeloGioacchino Del Regno
2026-09-11 5:17 ` Manivannan Sadhasivam
2026-09-10 9:20 ` [PATCH v4 06/12] phy: phy-mtk-dp: Support set_lanes in configure and properly cleanup AngeloGioacchino Del Regno
2026-09-10 9:30 ` sashiko-bot
2026-09-11 5:17 ` Manivannan Sadhasivam
2026-09-10 9:20 ` [PATCH v4 07/12] phy: phy-mtk-dp: Support setting volt swing and preemphasis values AngeloGioacchino Del Regno
2026-09-10 9:20 ` [PATCH v4 08/12] phy: phy-mtk-dp: Add support for digital and analog calibration AngeloGioacchino Del Regno
2026-09-10 9:35 ` sashiko-bot [this message]
2026-09-11 5:19 ` Manivannan Sadhasivam
2026-09-10 9:20 ` [PATCH v4 09/12] phy: phy-mtk-dp: Rewrite and document default driving param macros AngeloGioacchino Del Regno
2026-09-10 9:20 ` [PATCH v4 10/12] phy: phy-mtk-dp: Add bitrate register val definitions to SoC data AngeloGioacchino Del Regno
2026-09-10 9:20 ` [PATCH v4 11/12] phy: phy-mtk-dp: Add PHYD Lane EN register mask " AngeloGioacchino Del Regno
2026-09-11 5:20 ` Manivannan Sadhasivam
2026-09-10 9:20 ` [PATCH v4 12/12] phy: phy-mtk-dp: Add support for MT8196 eDP PHY AngeloGioacchino Del Regno
2026-09-13 10:56 ` [PATCH v4 00/12] PHY: MediaTek DP PHY refactor and MT8196 eDP Vinod Koul
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