Re: [PATCH 4/7] pinctrl: sunxi: support A733 generation MMIO register layout

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Critical] sunxi_irq_base_reg() fails to translate the logical IRQ bank index to the physical hardware GPIO bank index for NCAT3 layout, ignoring `irq_bank_map`.
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commit 45892bb17e985dc02bb352c830f93cc75106e307
Author: Andre Przywara <andre.przywara@arm.com>

pinctrl: sunxi: support A733 generation MMIO register layout

This commit adds support for the A733 SoC generation MMIO register layout.
It introduces the SUNXI_PINCTRL_NCAT3_REG_LAYOUT flag and updates bank
offsets, sizes, and IRQ register positions to accommodate the new hardware
design.

> diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
> index 15aa6fe62dbbc..d09467ed437a3 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
> +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
[ ... ]
> @@ -238,6 +248,10 @@ static inline u32 sunxi_irq_hw_bank_num(const struct sunxi_pinctrl_desc *desc,
>  
>  static inline u32 sunxi_irq_base_reg(const struct sunxi_pinctrl *pctl, u16 bank)
>  {
> +	if (pctl->flags & SUNXI_PINCTRL_NCAT3_REG_LAYOUT)
> +		return pctl->bank_offset + bank * pctl->bank_mem_size +
> +		       A733_IRQ_REGS_OFFSET;
> +

[Severity: Critical]
Does this new branch need to translate the logical IRQ bank index to the
physical hardware GPIO bank index?

By directly using bank * pctl->bank_mem_size instead of converting the
logical index via sunxi_irq_hw_bank_num(), could this calculate the wrong
physical addresses on SoCs with sparse IRQ capabilities?

For example, when sunxi_pinctrl_irq_handler() iterates over logical
IRQ banks and calls sunxi_irq_status_reg_from_bank() which then calls
sunxi_irq_base_reg(), will the handler read the wrong hardware register?

Could this cause the handler to see no pending interrupts and exit without
clearing the actual interrupt, leading to an infinite interrupt loop and
hard system lockup for level-triggered interrupts?

>  	return IRQ_REGS_OFFSET +
>  	       sunxi_irq_hw_bank_num(pctl->desc, bank) * IRQ_MEM_SIZE;
>  }

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Sashiko AI review · https://sashiko.dev/#/patchset/20260910133519.459011-1-andre.przywara@arm.com?part=4