From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B9AD421237; Sat, 12 Sep 2026 08:39:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789202359; cv=none; b=fHXmel8E+uG09wMNNIbjGSXnP2QX2I7lZsibMqcIvLl0w+dTXfQ6+AbOB87aQfiGvqhkrGk+03vwr/hPK+Vbjc523Av9gQUEkw7wuF32d2gtyDRGwjmkH1nJbcKFDtIjpNmqRyhMIOPR2kC4D3SHcGwdpMEI4ZTsZQccj0NrRjs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789202359; c=relaxed/simple; bh=N4cJ+1neKZ1MgK8R9M1x2BOiA+d5mi3obLJN2Tvd7kU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=O50akAVLxHqLeXgad/pnZUHGtnxbZuGbnbhIbuD3yg/5H9grKhAC+0kHKADkabB79WSZ+PE3mZjBXh+j0hx/91HVONdNsntYZoo+mBriq5cvsIY4EXP9SSnkd1cqLunYm+z8rawewnU6oGScyB+90RKfTFoGVwGTVynBOw4qs28= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SBS4LeRQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SBS4LeRQ" Received: by smtp.kernel.org (Postfix) with ESMTPS id C4268C4FDE3; Sat, 12 Sep 2026 08:39:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789202359; bh=N4cJ+1neKZ1MgK8R9M1x2BOiA+d5mi3obLJN2Tvd7kU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=SBS4LeRQyiIZP20fYxgRSCWQEjiFg1yQ+GV0xRfmSsfQFEW3qyYQC+6nX33f8GLoU wEmtWVUe8XLwaklIEWpECnUezw29d7jCjdu+xOriFeKd91LuFEc6qHdq/TbNvVcD4b rfQwokkRN7p/GTE5EQfvQ9+NvDZzE8IoNQAyup37rzmRn+XULCpH1UegN8DyPPd0bp aZSZY3to20RyUnRMqHh0qvOlBQCqeH8uNA1CY3xDYGo7cSRSfnBb9NwaTD9lR1Vfxn eIFA+r6Z+kvRHJbqc5jZLMqW/sMQcDdjzWJBQHrJ7v6PMuYGcPi+PxySIbm3gjtOkW zTsWBICkQYfCA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD3B8C79FB6; Sat, 12 Sep 2026 08:39:18 +0000 (UTC) From: Muzaffer Kadir via B4 Relay Date: Sat, 12 Sep 2026 11:39:22 +0300 Subject: [PATCH RFC 13/20] clk: qcom: smd-rpm: Add clocks for MSM8952 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260912-msm8952-initial-support-v1-13-0e742578b524@mainlining.org> References: <20260912-msm8952-initial-support-v1-0-0e742578b524@mainlining.org> In-Reply-To: <20260912-msm8952-initial-support-v1-0-0e742578b524@mainlining.org> To: Bjorn Andersson , Abel Vesa , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Ulf Hansson , Konrad Dybcio , "Joerg Roedel (AMD)" , Will Deacon , Robin Murphy , Lee Jones , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Robert Marko , Guru Das Srinagesh , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Kees Cook , Tony Luck , "Guilherme G. Piccoli" , Dmitry Torokhov Cc: David Heidelberg , Dang Huynh , phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, iommu@lists.linux.dev, mfd@lists.linux.dev, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Krzysztof Kozlowski , linux-pm@vger.kernel.org, linux-input@vger.kernel.org, Muzaffer Kadir X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789202354; l=2526; i=muzafferkadir@mainlining.org; s=20260816; h=from:subject:message-id; bh=+fbbxQznzh0EAsRYoXyBD9lf98TEt7urc9Q1WfJgNWo=; b=QkA6CKY/iZxxVumpyHBKti6xBNNNjPEOZTgP8ktL+4FuOcB5mh12Wqar04/gVtSyc72YdRvRx gSHRBLEIIbIA6XL7tN/dseny4/Qk+50P2Nv+Mii5/RLCKH790m8lR7Z X-Developer-Key: i=muzafferkadir@mainlining.org; a=ed25519; pk=4zkv4suQ3cYcO4Z7CrV8JSSjEGLBGepUtvQCFjgnYIU= X-Endpoint-Received: by B4 Relay for muzafferkadir@mainlining.org/20260816 with auth_id=954 X-Original-From: Muzaffer Kadir Reply-To: muzafferkadir@mainlining.org From: Muzaffer Kadir MSM8952 has same clocks with MSM8976 and MSM8940. Signed-off-by: Muzaffer Kadir --- drivers/clk/qcom/clk-smd-rpm.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 487d715ed5d2..4ed08cbfa8a2 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -740,6 +740,34 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8940 = { .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), }; +static struct clk_smd_rpm *msm8952_clks[] = { + [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, + [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, + [RPM_SMD_QDSS_CLK] = &clk_smd_rpm_qdss_clk, + [RPM_SMD_QDSS_A_CLK] = &clk_smd_rpm_qdss_a_clk, + [RPM_SMD_BB_CLK1] = &clk_smd_rpm_bb_clk1, + [RPM_SMD_BB_CLK1_A] = &clk_smd_rpm_bb_clk1_a, + [RPM_SMD_BB_CLK2] = &clk_smd_rpm_bb_clk2, + [RPM_SMD_BB_CLK2_A] = &clk_smd_rpm_bb_clk2_a, + [RPM_SMD_RF_CLK2] = &clk_smd_rpm_rf_clk2, + [RPM_SMD_RF_CLK2_A] = &clk_smd_rpm_rf_clk2_a, + [RPM_SMD_BB_CLK1_PIN] = &clk_smd_rpm_bb_clk1_pin, + [RPM_SMD_BB_CLK1_A_PIN] = &clk_smd_rpm_bb_clk1_a_pin, + [RPM_SMD_BB_CLK2_PIN] = &clk_smd_rpm_bb_clk2_pin, + [RPM_SMD_BB_CLK2_A_PIN] = &clk_smd_rpm_bb_clk2_a_pin, + [RPM_SMD_DIV_CLK2] = &clk_smd_rpm_div_clk2, + [RPM_SMD_DIV_A_CLK2] = &clk_smd_rpm_div_clk2_a, + [RPM_SMD_IPA_CLK] = &clk_smd_rpm_ipa_clk, + [RPM_SMD_IPA_A_CLK] = &clk_smd_rpm_ipa_a_clk, +}; + +static const struct rpm_smd_clk_desc rpm_clk_msm8952 = { + .clks = msm8952_clks, + .num_clks = ARRAY_SIZE(msm8952_clks), + .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks, + .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks), +}; + static struct clk_smd_rpm *msm8974_clks[] = { [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, @@ -1292,6 +1320,7 @@ static const struct of_device_id rpm_smd_clk_match_table[] = { { .compatible = "qcom,rpmcc-msm8936", .data = &rpm_clk_msm8936 }, { .compatible = "qcom,rpmcc-msm8937", .data = &rpm_clk_msm8937 }, { .compatible = "qcom,rpmcc-msm8940", .data = &rpm_clk_msm8940 }, + { .compatible = "qcom,rpmcc-msm8952", .data = &rpm_clk_msm8952 }, { .compatible = "qcom,rpmcc-msm8953", .data = &rpm_clk_msm8953 }, { .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 }, { .compatible = "qcom,rpmcc-msm8976", .data = &rpm_clk_msm8976 }, -- 2.54.0