From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mout02.posteo.de (mout02.posteo.de [185.67.36.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 912863EB81D for ; Sat, 12 Sep 2026 20:45:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.67.36.66 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789245915; cv=none; b=bXqaiTLfWlNzT0pjmQT7T5rjWkdRgAEX7Rp8iRmfpY6uggYp2+3b8EZYxQbq8vC0JhTdosNRnRbc0aORrPOKTUODQ5mZGXCVSQrMdd0juc8vLl6qlqhYYhGRzdqFOnFRTDeRpWtfg3ilt8TYX6tzkTypi9lQKyfjvd2gBovAF1s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789245915; c=relaxed/simple; bh=QZX+R39YfEMz1YW0fT6go5wgSTxtL50Zgg4jwWLHrH8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=T1Pnk8B7iyYIYYtswGIsq/yTZA5CelKfwMVFh8veH43YbAG8JYBujYdGyCXHF3Q7mjgA6laNiH1NVO9ZlC8VgFhw5sTuCZfZITA9B/zjQ+IhePS6pOjJ3V7ka87awl65cGZC/NWIlglkc5GbieT9nD+u3PsL15ZmLQegj3XW4ZA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=posteo.net; spf=pass smtp.mailfrom=posteo.net; dkim=pass (2048-bit key) header.d=posteo.net header.i=@posteo.net header.b=OOHWwWvQ; arc=none smtp.client-ip=185.67.36.66 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=posteo.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=posteo.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=posteo.net header.i=@posteo.net header.b="OOHWwWvQ" Received: from submission (posteo.de [185.67.36.169]) by mout02.posteo.de (Postfix) with ESMTPS id 86F52240101 for ; Sat, 12 Sep 2026 22:45:05 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=posteo.net; s=1984.8680eb; t=1789245905; bh=DQYvhd5nwDF+C0dkDYLe5yPvzGZ32GjjX1tx0SgEwRg=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version: Content-Transfer-Encoding:From; b=OOHWwWvQ1Buvm0eqMvV/4nQbi9B8c53edxOEqOM/3ScyY4XhEZFeFQIhdNqo911he Fe4bEg7+G1yAe0cM0eSL0BnXpJkkagvJzkMd/CakNaT/PuxmlTEh0AsntSQPQ304yB G0/EVTfHgoOLTyaJlCWBFXq3Npj8Nl1r2gaXk1eaG2VC4LCT55OuDZq3Hi9FlEQDYd ksdKQwrk8DFLUa60kOBGssRqGBoRZFE5UUvhBbXXdfUq+aQ8crDVXZqb/nJhT6luGe l2c37nWPCovKzTmg6OFwUkiK3xDnN8E6i286BVPJAssXXVVqaftyWVjQrPJMVlb11N K89iK6lOpa0Gg== Received: from customer (localhost [127.0.0.1]) by submission (posteo.de) with ESMTPSA id 4hj3M437p1z9rxL; Sat, 12 Sep 2026 22:45:04 +0200 (CEST) From: Mateusz Nowicki To: alexandre.torgue@foss.st.com, mcoquelin.stm32@gmail.com Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] arm64: dts: st: add sdmmc2 pins on stm32mp25 Date: Sat, 12 Sep 2026 20:45:05 +0000 Message-ID: <20260912204454.219606-3-mateusz.nowicki@posteo.net> In-Reply-To: <20260912204454.219606-1-mateusz.nowicki@posteo.net> References: <20260912204454.219606-1-mateusz.nowicki@posteo.net> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add the 8-bit bus pin groups of SDMMC2 on port E, used by the eMMC on the STM32MP257F-DK. Signed-off-by: Mateusz Nowicki --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 69 +++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi index 456ece7f8ebc..ad55791a72fc 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -431,6 +431,75 @@ pins { }; }; + /omit-if-no-ref/ + sdmmc2_b8_pins_a: sdmmc2-b8-0 { + pins1 { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + , /* SDMMC2_D7 */ + ; /* SDMMC2_CMD */ + slew-rate = <2>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* SDMMC2_CK */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + }; + + /omit-if-no-ref/ + sdmmc2_b8_od_pins_a: sdmmc2-b8-od-0 { + pins1 { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + ; /* SDMMC2_D7 */ + slew-rate = <2>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* SDMMC2_CK */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + pins3 { + pinmux = ; /* SDMMC2_CMD */ + slew-rate = <2>; + drive-open-drain; + bias-disable; + }; + }; + + /omit-if-no-ref/ + sdmmc2_b8_sleep_pins_a: sdmmc2-b8-sleep-0 { + pins { + pinmux = , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + , /* SDMMC2_D7 */ + , /* SDMMC2_CMD */ + ; /* SDMMC2_CK */ + }; + }; + /omit-if-no-ref/ spi3_pins_a: spi3-0 { pins1 { -- 2.55.0