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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39d98e60484sm19488728a91.4.2026.09.14.02.40.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Sep 2026 02:40:17 -0700 (PDT) From: Yin Li Date: Mon, 14 Sep 2026 17:37:53 +0800 Subject: [PATCH RFC v2 05/10] arm_mpam: Add device tree support for MSC probing Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260914-mpam-resctrl-dt-knp-support-v2-5-bf6645bb2f65@oss.qualcomm.com> References: <20260914-mpam-resctrl-dt-knp-support-v2-0-bf6645bb2f65@oss.qualcomm.com> In-Reply-To: <20260914-mpam-resctrl-dt-knp-support-v2-0-bf6645bb2f65@oss.qualcomm.com> To: James Morse , Rob Herring , Shanker Donthineni , Ben Horgan , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Greg Kroah-Hartman , "Rafael J. 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Add a device tree path so MSCs can be probed on DT-based platforms: parse MSC nodes from the device tree, compute cache-id and affinity from the cache nodes and create the RIS entries. Signed-off-by: James Morse [ Yin Li: fix context conflicts; drop the ACPI-only stub of mpam_get_cpumask_from_cache_id(); use of_node_get() for the cache parent to avoid a refcount underflow; reject out-of-range ris_idx after of_property_read_reg() before narrowing to u8; use u32 instead of unsigned long for cache-id values and compare against ~0U ] Signed-off-by: Yin Li --- drivers/resctrl/mpam_devices.c | 256 +++++++++++++++++++++++++++++++++++++--- drivers/resctrl/mpam_internal.h | 2 +- 2 files changed, 240 insertions(+), 18 deletions(-) diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c index c68135ee0ffc..7a5b27e87759 100644 --- a/drivers/resctrl/mpam_devices.c +++ b/drivers/resctrl/mpam_devices.c @@ -20,6 +20,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -161,6 +164,171 @@ static void mpam_free_garbage(void) } } +/* Called recursively to walk the list of caches from a particular CPU */ +static void __mpam_get_cpumask_from_cache_id(int cpu, struct device_node *cache_node, + u32 cache_id, + u32 cache_level, + cpumask_t *affinity) +{ + int err; + u32 iter_level; + u32 iter_cache_id; + struct device_node *iter_node __free(device_node) = of_find_next_cache_node(cache_node); + + if (!iter_node) + return; + + err = of_property_read_u32(iter_node, "cache-level", &iter_level); + if (err) + return; + + /* + * get_cpu_cacheinfo_id() isn't ready until sometime + * during device_initcall(). Use cache_of_calculate_id(). + */ + iter_cache_id = cache_of_calculate_id(iter_node); + if (iter_cache_id == ~0U) + return; + + if (iter_level == cache_level && iter_cache_id == cache_id) + cpumask_set_cpu(cpu, affinity); + + if (iter_level < cache_level) + __mpam_get_cpumask_from_cache_id(cpu, iter_node, cache_id, + cache_level, affinity); +} + +/* + * The cacheinfo structures are only populated when CPUs are online. + * This helper walks the device tree to include offline CPUs too. + */ +int mpam_get_cpumask_from_cache_id(u32 cache_id, u32 cache_level, + cpumask_t *affinity) +{ + int cpu; + + if (!acpi_disabled) + return acpi_pptt_get_cpumask_from_cache_id(cache_id, affinity); + + for_each_possible_cpu(cpu) { + struct device_node *cpu_node __free(device_node) = of_get_cpu_node(cpu, NULL); + if (!cpu_node) { + pr_err("Failed to find cpu%d device node\n", cpu); + return -ENOENT; + } + + __mpam_get_cpumask_from_cache_id(cpu, cpu_node, cache_id, + cache_level, affinity); + } + + return 0; +} + +static int get_cpumask_from_cache(struct device_node *cache, + cpumask_t *affinity) +{ + int err; + u32 cache_level; + u32 cache_id; + + err = of_property_read_u32(cache, "cache-level", &cache_level); + if (err) { + pr_err("Failed to read cache-level from cache node\n"); + return -ENOENT; + } + + cache_id = cache_of_calculate_id(cache); + if (cache_id == ~0U) { + pr_err("Failed to calculate cache-id from cache node\n"); + return -ENOENT; + } + + return mpam_get_cpumask_from_cache_id(cache_id, cache_level, affinity); +} + +static int mpam_dt_count_msc(void) +{ + int count = 0; + struct device_node *np; + + for_each_compatible_node(np, NULL, "arm,mpam-msc") { + if (of_device_is_available(np)) + count++; + } + + return count; +} + +static int mpam_dt_parse_resource(struct mpam_msc *msc, struct device_node *np, + u8 ris_idx) +{ + int err = 0; + u32 level = 0; + u32 cache_id; + struct device *dev = &msc->pdev->dev; + struct device_node *cache __free(device_node) = NULL; + struct device_node *parent __free(device_node) = of_get_parent(np); + + if (of_device_is_compatible(np, "arm,mpam-cache")) { + cache = of_parse_phandle(np, "arm,mpam-device", 0); + if (!cache) { + dev_err_once(dev, "Failed to read phandle\n"); + return -EINVAL; + } + } else if (of_device_is_compatible(parent, "cache")) { + cache = of_node_get(parent); + } else { + /* For now, only caches are supported */ + cache = NULL; + return err; + } + + err = of_property_read_u32(cache, "cache-level", &level); + if (err) { + dev_err_once(dev, "Failed to read cache-level\n"); + return err; + } + + cache_id = cache_of_calculate_id(cache); + if (cache_id == ~0U) { + dev_err_once(dev, "Failed to calculate cache-id\n"); + return -ENOENT; + } + + return mpam_ris_create(msc, ris_idx, MPAM_CLASS_CACHE, level, cache_id); +} + +static int mpam_dt_parse_resources(struct mpam_msc *msc, void *ignored) +{ + u64 ris_idx = 0; + int err, num_ris = 0; + struct device_node *np; + + np = msc->pdev->dev.of_node; + for_each_available_child_of_node_scoped(np, iter) { + err = of_property_read_reg(iter, 0, &ris_idx, NULL); + if (!err) { + /* + * ris_idx is read as u64 but indexes a 4-bit RIS selector + * (0..MPAM_MSC_MAX_NUM_RIS). Reject out-of-range values here, + * before it is narrowed to u8, so a large value cannot be + * truncated into a valid-looking index. + */ + if (ris_idx >= MPAM_MSC_MAX_NUM_RIS) + return -EINVAL; + num_ris++; + err = mpam_dt_parse_resource(msc, iter, ris_idx); + if (err) + return err; + } + } + + if (!num_ris) + err = mpam_dt_parse_resource(msc, np, 0); + + return err; +} + /* * Once mpam is enabled, new requestors cannot further reduce the available * partid. Assert that the size is fixed, and new requestors will be turned @@ -481,16 +649,6 @@ mpam_vmsc_find(struct mpam_component *comp, struct mpam_msc *msc) return mpam_vmsc_alloc(comp, msc); } -/* - * The cacheinfo structures are only populated when CPUs are online. - * This helper walks the acpi tables to include offline CPUs too. - */ -int mpam_get_cpumask_from_cache_id(unsigned long cache_id, u32 cache_level, - cpumask_t *affinity) -{ - return acpi_pptt_get_cpumask_from_cache_id(cache_id, affinity); -} - /* * cpumask_of_node() only knows about online CPUs. This can't tell us whether * a class is represented on all possible CPUs. @@ -1987,15 +2145,34 @@ static int mpam_msc_setup_error_irq(struct mpam_msc *msc) */ static void update_msc_accessibility(struct mpam_msc *msc) { + struct device *dev = &msc->pdev->dev; + struct device_node *parent; u32 affinity_id; int err; - err = device_property_read_u32(&msc->pdev->dev, "cpu_affinity", - &affinity_id); - if (err) + if (!acpi_disabled) { + err = device_property_read_u32(&msc->pdev->dev, "cpu_affinity", + &affinity_id); + if (err) + cpumask_copy(&msc->accessibility, cpu_possible_mask); + else + acpi_pptt_get_cpus_from_container(affinity_id, + &msc->accessibility); + + return; + } + + /* Where an MSC can be accessed from depends on the path to of_node. */ + parent = of_get_parent(msc->pdev->dev.of_node); + if (parent == of_root) { cpumask_copy(&msc->accessibility, cpu_possible_mask); - else - acpi_pptt_get_cpus_from_container(affinity_id, &msc->accessibility); + } else { + if (of_device_is_compatible(parent, "cache")) + get_cpumask_from_cache(parent, &msc->accessibility); + else + dev_err_once(dev, "Cannot determine accessibility of MSC.\n"); + } + of_node_put(parent); } /* @@ -2123,7 +2300,10 @@ static int mpam_msc_drv_probe(struct platform_device *pdev) return PTR_ERR(msc); /* Create RIS entries described by firmware */ - err = acpi_mpam_parse_resources(msc, plat_data); + if (!acpi_disabled) + err = acpi_mpam_parse_resources(msc, plat_data); + else + err = mpam_dt_parse_resources(msc, plat_data); if (err) { mpam_msc_drv_remove(pdev); return err; @@ -2136,15 +2316,51 @@ static int mpam_msc_drv_probe(struct platform_device *pdev) return 0; } +static const struct of_device_id mpam_of_match[] = { + { .compatible = "arm,mpam-msc", }, + {}, +}; +MODULE_DEVICE_TABLE(of, mpam_of_match); + static struct platform_driver mpam_msc_driver = { .driver = { .name = "mpam_msc", .suppress_bind_attrs = true, + .of_match_table = of_match_ptr(mpam_of_match), }, .probe = mpam_msc_drv_probe, .remove = mpam_msc_drv_remove, }; +/* + * MSCs that are declared by the firmware as being part of a cache may not + * be created automatically as platform devices, since there is no + * dedicated cache driver. + * + * Deal with theo MSCs here. + */ +static void mpam_dt_create_foundling_msc(void) +{ + struct platform_device *pdev; + struct device_node *cache; + + for_each_compatible_node(cache, NULL, "cache") { + struct device_node *cache_device; + + if (of_node_check_flag(cache, OF_POPULATED)) + continue; + + cache_device = of_find_matching_node_and_match(cache, mpam_of_match, NULL); + if (!cache_device) + continue; + of_node_put(cache_device); + + pdev = of_platform_device_create(cache, "cache", NULL); + if (!pdev) + pr_err_once("Failed to create MSC devices under caches\n"); + } +} + /* Any of these features mean the BWA_WD field is valid. */ static bool mpam_has_bwa_wd_feature(struct mpam_props *props) { @@ -2963,12 +3179,18 @@ static int __init mpam_msc_driver_init(void) init_srcu_struct(&mpam_srcu); - fw_num_msc = acpi_mpam_count_msc(); + if (!acpi_disabled) + fw_num_msc = acpi_mpam_count_msc(); + else + fw_num_msc = mpam_dt_count_msc(); if (fw_num_msc <= 0) { pr_err("No MSC devices found in firmware\n"); return -EINVAL; } + if (acpi_disabled) + mpam_dt_create_foundling_msc(); + return platform_driver_register(&mpam_msc_driver); } diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h index def0e3a65c23..aa45d00bcd07 100644 --- a/drivers/resctrl/mpam_internal.h +++ b/drivers/resctrl/mpam_internal.h @@ -470,7 +470,7 @@ int mpam_msmon_read(struct mpam_component *comp, struct mon_cfg *ctx, enum mpam_device_features, u64 *val); void mpam_msmon_reset_mbwu(struct mpam_component *comp, struct mon_cfg *ctx); -int mpam_get_cpumask_from_cache_id(unsigned long cache_id, u32 cache_level, +int mpam_get_cpumask_from_cache_id(u32 cache_id, u32 cache_level, cpumask_t *affinity); #ifdef CONFIG_RESCTRL_FS -- 2.34.1