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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39d98e60484sm19488728a91.4.2026.09.14.02.40.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Sep 2026 02:40:41 -0700 (PDT) From: Yin Li Date: Mon, 14 Sep 2026 17:37:56 +0800 Subject: [PATCH RFC v2 08/10] dt-bindings: arm: Fix MPAM MSC binding schema and examples Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260914-mpam-resctrl-dt-knp-support-v2-8-bf6645bb2f65@oss.qualcomm.com> References: <20260914-mpam-resctrl-dt-knp-support-v2-0-bf6645bb2f65@oss.qualcomm.com> In-Reply-To: <20260914-mpam-resctrl-dt-knp-support-v2-0-bf6645bb2f65@oss.qualcomm.com> To: James Morse , Rob Herring , Shanker Donthineni , Ben Horgan , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Greg Kroah-Hartman , "Rafael J. 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For more information, see the Not-Ready (NRDY) bit description in the MPAM specification. - numa-node-id: true # see NUMA binding + numa-node-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: NUMA node identifier for the memory resource this MSC controls. '#address-cells': const: 1 @@ -72,16 +76,17 @@ patternProperties: maximum: 0xf cpus: + $ref: /schemas/types.yaml#/definitions/phandle-array description: - Phandle(s) to the CPU node(s) this RIS belongs to. By default, the parent - device's affinity is used. + Phandle(s) to the CPU node(s) this RIS belongs to. By default, the + parent device's affinity is used. arm,mpam-device: $ref: /schemas/types.yaml#/definitions/phandle description: By default, the MPAM enabled device associated with a RIS is the MSC's - parent node. It is possible for each RIS to be associated with different - devices in which case 'arm,mpam-device' should be used. + parent node. It is possible for each RIS to be associated with + different devices in which case 'arm,mpam-device' should be used. required: - compatible @@ -92,14 +97,14 @@ required: - reg dependencies: - interrupts: [ interrupt-names ] + interrupts: [interrupt-names] additionalProperties: false examples: - | L3: cache-controller@30000000 { - compatible = "arm,dsu-l3-cache", "cache"; + compatible = "foo,a-l3-cache", "cache"; cache-level = <3>; cache-unified; @@ -109,7 +114,6 @@ examples: msc@10000 { compatible = "arm,mpam-msc"; - reg = <0x10000 0x2000>; interrupts = <1>, <2>; interrupt-names = "error", "overflow"; @@ -145,7 +149,7 @@ examples: msc@41000 { compatible = "arm,mpam-msc"; - reg = <0 0x1000>; + reg = <0x41000 0x1000>; interrupts = <5>, <6>; interrupt-names = "error", "overflow"; arm,not-ready-us = <1>; @@ -155,8 +159,8 @@ examples: ris@2 { compatible = "arm,mpam-cache"; - reg = <0>; - // TODO: How to map to device(s)? + reg = <2>; + arm,mpam-device = <&L3>; }; }; }; @@ -173,7 +177,6 @@ examples: msc@10000 { compatible = "arm,mpam-msc"; - reg = <0x10000 0x2000>; interrupts = <7>; interrupt-names = "overflow"; -- 2.34.1