From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C4B74534BB; Mon, 14 Sep 2026 11:39:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789385981; cv=none; b=NplDqd2brkANaueHNd/ZLNil/KvRwxDk6GKa1Dajv2gF5b3/OPE0HJXR0d720BPo5BZpyWslntNxxTHkTe6/a+9ZdJ0gehoYE5iqX6CxY659U8gbR/nEFHuWmhJqIQwYfmVgky2qefPo4ewF6rjbqE2WPEVzAym0g19lPcdAnvc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789385981; c=relaxed/simple; bh=e3wkXdEp4ihVCNlB79psAjnQ3tcPGmE4joM19fdsiOY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mXiNOGL8p8DpbYZBvE9FW5kqddRhgg1qJ9h6ZmChpjhOPY9f9lT53XRvsmHBwSRwN3VuGV5gQCPfQoAiYkG1d8nt0WNuau2yvKUCdv/FMSPsDjJce3FcMcOf9vxjQfxnOfzx1gTM8V10ZijiXxWYafna5cRb9ZEVz5fMTA0W4bo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=Abct/y7f; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="Abct/y7f" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1789385977; bh=e3wkXdEp4ihVCNlB79psAjnQ3tcPGmE4joM19fdsiOY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Abct/y7fPf46ndoj51IkXIAsMO/qwsRV0ouG6iqaxDiGmkX7kYYd8HE2eQENHXUPi UdL8U+uZs/SGFCJDDb3dnc1BDMJjbDyAq5uFQSS884v/P4pd6dCbUVYheacKL5X3eu bDzUp3wF9M84tKolU4hb2LgqrFEAzbBFOf9wEE/IuYtkUsdsjygufeGMoId0I5ZSLr RYJxWpr8et279Wnmca2lwZ3b5JZWXq3bUdeL4aDXA7KwKccms6sddKFVQLODT4B6ex nmqPInEtQbtfR3ftpaIwk7dYO9o7nVVjVI3t89oeWY40RGxGs794KlIpemW16zUHIS uDmE0YLYbppdw== Received: from yukiji.home (unknown [100.64.0.131]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laeyraud) by bali.collaboradmins.com (Postfix) with ESMTPSA id 0F38717E091A; Mon, 14 Sep 2026 13:39:36 +0200 (CEST) From: Louis-Alexis Eyraud Date: Mon, 14 Sep 2026 13:39:02 +0200 Subject: [PATCH v12 16/24] scsi: ufs: mediatek: Rework _ufs_mtk_clk_scale error paths Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260914-mt8196-ufs-v12-16-9279d7ef814d@collabora.com> References: <20260914-mt8196-ufs-v12-0-9279d7ef814d@collabora.com> In-Reply-To: <20260914-mt8196-ufs-v12-0-9279d7ef814d@collabora.com> To: Chunfeng Yun , Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Peter Wang , Chaotian Jing , Alim Akhtar , Avri Altman , Bart Van Assche , Stanley Jhu , "James E.J. Bottomley" , Philipp Zabel , Liam Girdwood , Mark Brown , Manivannan Sadhasivam , "Martin K. Petersen" Cc: kernel@collabora.com, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org, Nicolas Frattaroli , Louis-Alexis Eyraud X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789385943; l=3592; i=louisalexis.eyraud@collabora.com; s=20250113; h=from:subject:message-id; bh=jvXLQZATgiXLw4Qin4439gnZ2vmPjomfUnBWrKcXcBE=; b=SfJeFwUBhKN17xmpJaqOdw4lnRjQZtyrWnmsGo5x7GC/7cXlZ5XE/hQO5r2VVDA1eHlsUUtME fphnoWv3Ov3DiEYMGfGquhcUFPrNKGaQdMZM1RmSsRPx/va71t/vJPs X-Developer-Key: i=louisalexis.eyraud@collabora.com; a=ed25519; pk=CHFBDB2Kqh4EHc6JIqFn69GhxJJAzc0Zr4e8QxtumuM= From: Nicolas Frattaroli Errors should be printed at the correct log level. Additionally, it looks like some "goto out"'s were omitted in the scale up case, which looks like a mistake, as the scale down branch of the code does use them. Rework the error messages to make them nicer and at the correct verbosity, and add the missing gotos. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Peter Wang Signed-off-by: Nicolas Frattaroli Signed-off-by: Louis-Alexis Eyraud --- drivers/ufs/host/ufs-mediatek.c | 41 +++++++++++++++++++---------------------- 1 file changed, 19 insertions(+), 22 deletions(-) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index 8e2aeb877de8..b5b13444d27c 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -2020,16 +2020,16 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up) ret = clk_prepare_enable(clki->clk); if (ret) { - dev_info(hba->dev, - "clk_prepare_enable() fail, ret: %d\n", ret); + dev_err(hba->dev, "%s: Failed to enable clock: %pe\n", __func__, ERR_PTR(ret)); return; } if (clk_fde_scale) { ret = clk_prepare_enable(fde_clki->clk); if (ret) { - dev_info(hba->dev, - "fde clk_prepare_enable() fail, ret: %d\n", ret); + dev_err(hba->dev, "%s: Failed to enable FDE clock: %pe\n", + __func__, ERR_PTR(ret)); + clk_disable_unprepare(clki->clk); return; } } @@ -2038,51 +2038,48 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up) if (clk_bind_vcore) { ret = regulator_set_voltage(reg, volt, INT_MAX); if (ret) { - dev_info(hba->dev, - "Failed to set vcore to %d\n", volt); + dev_err(hba->dev, "Failed to set vcore to %d\n", volt); goto out; } } ret = clk_set_parent(clki->clk, mclk->ufs_sel_max_clki->clk); if (ret) { - dev_info(hba->dev, "Failed to set clk mux, ret = %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set clock mux: %pe\n", + __func__, ERR_PTR(ret)); + goto out; } if (clk_fde_scale) { - ret = clk_set_parent(fde_clki->clk, - mclk->ufs_fde_max_clki->clk); + ret = clk_set_parent(fde_clki->clk, mclk->ufs_fde_max_clki->clk); if (ret) { - dev_info(hba->dev, - "Failed to set fde clk mux, ret = %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set fde clock mux: %pe\n", + __func__, ERR_PTR(ret)); + goto out; } } } else { if (clk_fde_scale) { - ret = clk_set_parent(fde_clki->clk, - mclk->ufs_fde_min_clki->clk); + ret = clk_set_parent(fde_clki->clk, mclk->ufs_fde_min_clki->clk); if (ret) { - dev_info(hba->dev, - "Failed to set fde clk mux, ret = %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set fde clock mux: %pe\n", + __func__, ERR_PTR(ret)); goto out; } } ret = clk_set_parent(clki->clk, mclk->ufs_sel_min_clki->clk); if (ret) { - dev_info(hba->dev, "Failed to set clk mux, ret = %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set clock mux: %pe\n", + __func__, ERR_PTR(ret)); goto out; } if (clk_bind_vcore) { ret = regulator_set_voltage(reg, 0, INT_MAX); if (ret) { - dev_info(hba->dev, - "failed to set vcore to MIN\n"); + dev_err(hba->dev, "%s: Failed to set vcore to minimum: %pe\n", + __func__, ERR_PTR(ret)); } } } -- 2.55.0