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Petersen" , Sai Krishna Potthuri , Ajay Neeli , Manivannan Sadhasivam , Pedro Sousa Cc: linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, clizzi@redhat.com, aruizrui@redhat.com, eballetb@redhat.com, echanude@redhat.com Subject: [PATCH v2 01/10] ufs: unipro: Move Tx/Rx FSM state definitions to unipro.h Date: Mon, 14 Sep 2026 14:49:51 +0200 Message-ID: <20260914125000.30812-2-larisa.grigore@oss.nxp.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260914125000.30812-1-larisa.grigore@oss.nxp.com> References: <20260914125000.30812-1-larisa.grigore@oss.nxp.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: AM9P195CA0013.EURP195.PROD.OUTLOOK.COM (2603:10a6:20b:21f::18) To GV2PR04MB12558.eurprd04.prod.outlook.com (2603:10a6:150:368::10) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR04MB12558:EE_|AM9PR04MB8971:EE_ X-MS-Office365-Filtering-Correlation-Id: fcf5182e-571d-4149-db3c-08df125eb41c X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|23010399003|1800799024|366016|19092799006|921020|11063799006|56012099006|10067099003|22082099003|18002099003|6133799003; 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These state values are UniPro/M-PHY related and are not specific to the DesignWare UFS host controller implementation, so unipro.h is a more appropriate location for sharing them. As part of this move, drop the driver-private TX_FSM_HIBERN8 define in ufs-hisi and ufs-qcom and repoint their Hibern8 checks at the shared TX_STATE_HIBERN8 enum constant. This is a no-op change: TX_FSM_HIBERN8 was 0x1 and TX_STATE_HIBERN8 is 1, so the compared values are identical. This also prepares for using these definitions in a subsequent commit. Signed-off-by: Larisa Grigore --- drivers/ufs/host/ufs-hisi.c | 8 ++++---- drivers/ufs/host/ufs-hisi.h | 1 - drivers/ufs/host/ufs-qcom.c | 4 ++-- drivers/ufs/host/ufs-qcom.h | 1 - drivers/ufs/host/ufshcd-dwc.h | 19 ------------------- include/ufs/unipro.h | 20 ++++++++++++++++++++ 6 files changed, 26 insertions(+), 27 deletions(-) diff --git a/drivers/ufs/host/ufs-hisi.c b/drivers/ufs/host/ufs-hisi.c index 993e20ac211d..2d214ce9620e 100644 --- a/drivers/ufs/host/ufs-hisi.c +++ b/drivers/ufs/host/ufs-hisi.c @@ -34,8 +34,8 @@ static int ufs_hisi_check_hibern8(struct ufs_hba *hba) &tx_fsm_val_0); err |= ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 1), &tx_fsm_val_1); - if (err || (tx_fsm_val_0 == TX_FSM_HIBERN8 && - tx_fsm_val_1 == TX_FSM_HIBERN8)) + if (err || (tx_fsm_val_0 == TX_STATE_HIBERN8 && + tx_fsm_val_1 == TX_STATE_HIBERN8)) break; /* sleep for max. 200us */ @@ -56,8 +56,8 @@ static int ufs_hisi_check_hibern8(struct ufs_hba *hba) if (err) { dev_err(hba->dev, "%s: unable to get TX_FSM_STATE, err %d\n", __func__, err); - } else if (tx_fsm_val_0 != TX_FSM_HIBERN8 || - tx_fsm_val_1 != TX_FSM_HIBERN8) { + } else if (tx_fsm_val_0 != TX_STATE_HIBERN8 || + tx_fsm_val_1 != TX_STATE_HIBERN8) { err = -1; dev_err(hba->dev, "%s: invalid TX_FSM_STATE, lane0 = %d, lane1 = %d\n", __func__, tx_fsm_val_0, tx_fsm_val_1); diff --git a/drivers/ufs/host/ufs-hisi.h b/drivers/ufs/host/ufs-hisi.h index 5a90c0f4e90c..6af6a268458d 100644 --- a/drivers/ufs/host/ufs-hisi.h +++ b/drivers/ufs/host/ufs-hisi.h @@ -43,7 +43,6 @@ * M-TX Configuration Attributes for Hixxxx */ #define MPHY_TX_FSM_STATE 0x41 -#define TX_FSM_HIBERN8 0x1 /* * Hixxxx UFS HC specific Registers diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 954be9343f42..38897d01fde2 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -393,7 +393,7 @@ static int ufs_qcom_check_hibern8(struct ufs_hba *hba) UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)), &tx_fsm_val); - if (err || tx_fsm_val == TX_FSM_HIBERN8) + if (err || tx_fsm_val == TX_STATE_HIBERN8) break; /* sleep for max. 200us */ @@ -413,7 +413,7 @@ static int ufs_qcom_check_hibern8(struct ufs_hba *hba) if (err) { dev_err(hba->dev, "%s: unable to get TX_FSM_STATE, err %d\n", __func__, err); - } else if (tx_fsm_val != TX_FSM_HIBERN8) { + } else if (tx_fsm_val != TX_STATE_HIBERN8) { err = tx_fsm_val; dev_err(hba->dev, "%s: invalid TX_FSM_STATE = %d\n", __func__, err); diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index a5ad5ce44a19..3c6cb2281af0 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -11,7 +11,6 @@ #include #define MPHY_TX_FSM_STATE 0x41 -#define TX_FSM_HIBERN8 0x1 #define HBRN8_POLL_TOUT_MS 100 #define DEFAULT_CLK_RATE_HZ 1000000 #define MAX_SUPP_MAC 64 diff --git a/drivers/ufs/host/ufshcd-dwc.h b/drivers/ufs/host/ufshcd-dwc.h index c618bb914904..a5e40e7604a1 100644 --- a/drivers/ufs/host/ufshcd-dwc.h +++ b/drivers/ufs/host/ufshcd-dwc.h @@ -39,25 +39,6 @@ #define RX_AFE_CTLE_IDAC(n) (0x4001 + ((n) * 0x100)) #define FW_CALIB_CCFG(n) (0x404D + ((n) * 0x100)) -/* Tx/Rx FSM state */ -enum rx_fsm_state { - RX_STATE_DISABLED = 0, - RX_STATE_HIBERN8 = 1, - RX_STATE_SLEEP = 2, - RX_STATE_STALL = 3, - RX_STATE_LSBURST = 4, - RX_STATE_HSBURST = 5, -}; - -enum tx_fsm_state { - TX_STATE_DISABLED = 0, - TX_STATE_HIBERN8 = 1, - TX_STATE_SLEEP = 2, - TX_STATE_STALL = 3, - TX_STATE_LSBURST = 4, - TX_STATE_HSBURST = 5, -}; - struct ufshcd_dme_attr_val { u32 attr_sel; u32 mib_val; diff --git a/include/ufs/unipro.h b/include/ufs/unipro.h index 9c168703b104..e0f490e11c7f 100644 --- a/include/ufs/unipro.h +++ b/include/ufs/unipro.h @@ -466,4 +466,24 @@ enum { CPORT_CONNECTED, }; +/* RX_FSM_State encoding, MIPI M-PHY v6.0 Table 50 (M-RX Status Attributes) */ +enum ufs_rx_fsm_state { + RX_STATE_DISABLED = 0, + RX_STATE_HIBERN8 = 1, + RX_STATE_SLEEP = 2, + RX_STATE_STALL = 3, + RX_STATE_LSBURST = 4, + RX_STATE_HSBURST = 5, +}; + +/* TX_FSM_State encoding, MIPI M-PHY v6.0 Table 47 (M-TX Status Attributes) */ +enum ufs_tx_fsm_state { + TX_STATE_DISABLED = 0, + TX_STATE_HIBERN8 = 1, + TX_STATE_SLEEP = 2, + TX_STATE_STALL = 3, + TX_STATE_LSBURST = 4, + TX_STATE_HSBURST = 5, +}; + #endif /* _UNIPRO_H_ */ -- 2.43.0