Re: [PATCH v4 45/52] arm64: dts: qcom: sm8150: Add GCC CX power domain

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Incorrect Power Domain Mapping for SDHC controller in sm8150.dtsi
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commit 1237bb3ae1765094917da1bf7fa592fe294eff27
Author: Abel Vesa <abel.vesa@oss.qualcomm.com>

arm64: dts: qcom: sm8150: Add GCC CX power domain

This commit adds the CX power-domain reference to the GCC node for the
SM8150 platform. This ensures that GCC GDSC consumers properly propagate
their performance state votes to the RPMh CX domain.

> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 94a3b02cb2897..397c0142ea579 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
[ ... ]
> @@ -913,6 +913,7 @@ gcc: clock-controller@100000 {
>  				      "sleep_clk";
>  			clocks = <&rpmhcc RPMH_CXO_CLK>,
>  				 <&sleep_clk>;
> +			power-domains = <&rpmhpd SM8150_CX>;
>  		};

While reviewing power domain mappings in this file, I noticed a potential
issue further down in the sdhc_2 node:

arch/arm64/boot/dts/qcom/sm8150.dtsi:sdhc_2 {
    ...
			power-domains = <&rpmhpd 0>;
    ...
}

[Severity: High]
This is a pre-existing issue, but does this incorrectly map the SDHC
controller to power domain index 0?

Index 0 corresponds to SM8150_MSS (Modem Subsystem) instead of SM8150_CX. When
the mmc driver is initialized or accessed, it requests higher clock
frequencies and scales up the attached power domain via dev_pm_opp_set_rate().
If mapped to index 0, it will request voltage changes on the Modem Subsystem
rather than the CX domain.

Could this leave the CX domain undervolted for the SDHC controller's clock
frequencies, potentially leading to hardware instability or data corruption
during SD card access?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260914-qcom-tie-cx-to-gcc-v4-0-9d5a606ada33@oss.qualcomm.com?part=45