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[129.46.232.65]) by smtp.gmail.com with ESMTPSA id af79cd13be357-93a3f467566sm18939785a.39.2026.09.15.02.27.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 02:27:58 -0700 (PDT) From: Yongxing Mou Subject: [PATCH v2 0/3] drm/msm/dpu: Add INT2 GDSC power domain support for Kaanapali Date: Tue, 15 Sep 2026 17:27:47 +0800 Message-Id: <20260915-msm_gdsc2-v2-0-9157237b8382@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-B4-Tracking: v=1; b=H4sIAJMPqWoC/22OywrCMBBFf6XM2kg6rUnqyv8QkTwmGrBWM7Uo0 n831q2bC+cynLlvYMqJGLbVGzJNidNwLYCrCvzZXk8kUigMKFFJjVL03B9PgT0K7zpspERtMUC 5v2WK6bm49ocfZ7o/inL8leAsk/BD36dxWzkirZqwiU1bu67zsdVoI7mNNKHtjIkKrfK2hq/rn Hgc8muZOdWL7M+iqRZStMpoo1RQ3sndwLy+P+zl+3RdAg7zPH8AH0qKE/UAAAA= X-Change-ID: 20260720-msm_gdsc2-cb9230027a2d To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krishna Manikandan , Abel Vesa , Yuanjie Yang , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Yongxing Mou X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789464471; l=1690; i=yongxing.mou@oss.qualcomm.com; s=20250910; h=from:subject:message-id; bh=tS5jYHAOJiHwqtVjHphp88eu6y5+S+EodtZQBgori04=; b=7tl1t99L/eer1X7h6G9i0YVXv+uuiXjnDmBy1pJtQsinRKG6Wz0LgXvJ6daGyiR+PmRG70xN7 AYrKFQ2cdNoCNBkvUufsDR+Gng9T4t6C5nSDS1KqOcHYRTUsWe2eYAz X-Developer-Key: i=yongxing.mou@oss.qualcomm.com; a=ed25519; pk=rAy5J1eP+V7OXqH5FJ7ngMCtUrnHhut30ZTldOj52UM= X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDEzNSBTYWx0ZWRfX2F8hHwk6U3sp 7O6HysxxBQMUehz92Wo8VGTrnJ32mkMCKQWaCxzOh875KC93z5tzbC801JCR7UViZtuALyHLfoW 0vNSTSEcgVr5Y9eo+DbOcNXlyM2qAzo= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDEzNSBTYWx0ZWRfX8UocMGsSHlOV rWd/rNKcBlA70h9dncIH1tuL8rR/e24+/f3Leea/NaoogB9DObB6S2w5ihPSCmjnGS+LmW4JmFX HDmLTPCMIxrZE97lA+waCjRCzwSHsH0TLbOT5OhIm/KO34hNGU3u/LZ0OcAbVTvfECEUuLFWo8s tSU7SeZ7lQwvCcjqmm6WMzsLFtcPtYyB3RwqvHq2pS1s5pjw2tyXIdAl2gHxSshcQX6JWnGeXGo VrUIWohytOuofFFEd8eHoIBWewtnRgfAhWe5K8twCY9akfaAhA+Q1AYWm+gF+rhjm4aAQdwryBu 2uQb+klrOLJR1QIUFEPQi/QYX4l/+e5yTcO86PKKTTuNepJdZShOacLFnRr1zlSAlV8tgUGnsk5 4P3PE2WKWWHfN5+hPjJImm4/jKKkkfboQXChslaUw8xItC9sg/rJOyYLz6qTKLzlRqlwO6uWs8S zhZ5aIq/Dq5UjBdJYkg== X-Authority-Analysis: v=2.4 cv=PKKaavqC c=1 sm=1 tr=0 ts=6aa90fa0 cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=smZlIRouz1c8XS0CwesA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-GUID: NZTrHhhl3Mlq_FVpR2Vi_aweeNrxW43T X-Proofpoint-ORIG-GUID: NZTrHhhl3Mlq_FVpR2Vi_aweeNrxW43T X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_02,2026-09-14_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 malwarescore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 phishscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150135 Kaanapali (SM8750) has an additional INT2 GDSC that powers a subset of DPU source pipes (VIG2/VIG3/DMA5). Without enabling it, those pipes remain inaccessible. This series adds INT2 GDSC as a second power domain on the DPU device node, updates the DT bindings to describe it (restricted to Kaanapali via if/then), and attaches it in the DPU driver alongside the existing MMCX performance-state domain. Signed-off-by: Yongxing Mou --- Changes in v2: - Moved INT2 GDSC from MDSS to DPU, as it only powers DPU-local source pipes (Dmitry) - Dropped Glymur — only Kaanapali actually needs INT2 GDSC - Used if/then in DT binding to restrict second power domain to Kaanapali compatible only (Dmitry, Krzysztof) - Dropped PD_FLAG_NO_DEV_LINK, let device link auto-attach handle INT2 as runtime-PM supplier (Dmitry) - Link to v1: https://lore.kernel.org/r/20260720-msm_gdsc2-v1-0-4687866d6cb0@oss.qualcomm.com --- Yongxing Mou (3): dt-bindings: display: msm: Add INT2 GDSC to Kaanapali DPU drm/msm/dpu: Attach INT2 power domain alongside MMCX on Kaanapali arm64: dts: qcom: Add INT2 GDSC to Kaanapali DPU .../bindings/display/msm/dpu-common.yaml | 19 +++++++++++-- .../bindings/display/msm/qcom,sm8650-dpu.yaml | 23 ++++++++++++++++ arch/arm64/boot/dts/qcom/kaanapali.dtsi | 4 ++- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 32 ++++++++++++++++++++++ 4 files changed, 75 insertions(+), 3 deletions(-) --- base-commit: bee763d5f341b99cf472afeb508d4988f62a6ca1 change-id: 20260720-msm_gdsc2-cb9230027a2d Best regards, -- Yongxing Mou