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[92.247.61.126]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49e7d6bf4desm88186235e9.15.2026.09.15.06.38.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 06:38:13 -0700 (PDT) From: Petko Manolov To: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, Petko Manolov Subject: [PATCH v5 2/3] dt-bindings: arm: altera: add Draeger M48 Module Date: Tue, 15 Sep 2026 16:38:03 +0300 Message-ID: <20260915133805.3249587-3-petko.manolov@konsulko.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260915133805.3249587-1-petko.manolov@konsulko.com> References: <20260915133805.3249587-1-petko.manolov@konsulko.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add DT compatible string for Draeger's M48 CPU Module that is also based on Altera SoCFPGA. Signed-off-by: Petko Manolov --- Documentation/devicetree/bindings/arm/altera.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index 3030cf46fe74..8ed1ba733510 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -47,6 +47,7 @@ properties: - enum: - altr,socfpga-cyclone5-socdk - denx,mcvevk + - draeger,M48 - ebv,socrates - macnica,sodia - novtech,chameleon96 -- 2.47.3