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[174.29.1.49]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-4881f4d7861sm6103834fac.1.2026.09.20.12.45.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Sep 2026 12:45:38 -0700 (PDT) From: James Hilliard Subject: [PATCH net-next v4 0/6] net: stmmac: add Allwinner H616 EMAC1 support Date: Sun, 20 Sep 2026 13:45:26 -0600 Message-Id: <20260920-submit-h616-emac1-v1-v4-0-8347dfe2eb7d@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAAAAAAAC/43OwQrCMAwG4FeRnq00aa2bJ99DPDQ1uorbZK1Dk b27dXoQURByCUm+PzcRuQscxXJyEx33IYa2yY2ZToSvXLNnGba5F6jQqhKMjGeqQ5KVBSu5dh5 kDxKMXihdGHREIp+eOt6Fy8iuRcNJNnxJYvOcZOHAPj3Ux24VYmq76/hBD+PFK2z+PSyXklDOt 6yIYFe41b524TjzbT1G9PgPghnRiKSRjWIqPxH9jix+IDojFj0VGixDSe/IMAx3ppIpa14BAAA = X-Change-ID: 20260914-submit-h616-emac1-v1-143703842abb To: Richard Genoud , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Alexandre Torgue , Giuseppe Cavallaro , Jose Abreu , Maxime Chevallier , Maxime Coquelin , Russell King , Christian Marangi , Andrew Lunn , Heiner Kallweit , Tiezhu Yang , Huacai Chen Cc: Maxime Ripard , Alastair D'Silva , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, James Hilliard , Andre Przywara X-Mailer: b4 0.15.2 The H616 secondary EMAC supports RMII at 10/100 Mbps and uses a separate system-control clock register at offset 0x34. Add its binding and a sun8i stmmac variant using that register. A distinct compatible without an older fallback prevents the driver from using EMAC0's clock register. EMAC1 connects internally to the co-packaged AC200 or AC300 EPHY and has no external PHY pins. Leave PHY initialization to the PHY driver instead of using the H3 internal-PHY controls. The RMII-only variant does not expose the RGMII clock-delay properties. First fix failed MTU-change reopening and hardware-resume cleanup in the stmmac core so the interface is closed without repeating NAPI shutdown or resource teardown. Allow phylink to stop a suspended instance without restarting its link. Then move the MAC software reset from probe to the DMA reset callback, after PHY initialization. This lets the MAC and its MDIO bus remain registered when the PHY driver or one of its suppliers is not ready yet. Clear DMA and interrupt state even if the reset times out. Keep the separate H3 MDIO-mux reset sequence unchanged. The AC200/AC300 EPHY driver and package bindings are already in net-next. This series separates the H616 EMAC1 MAC driver and binding support from the earlier combined series. PWM, MFD and device-tree enablement are being handled separately. Signed-off-by: James Hilliard --- Changes in v4: - Add a prerequisite stmmac core fix closing the interface after a failed MTU-change reopen without repeating DMA, IRQ or NAPI teardown. - Close the interface after failed hardware resume, and let phylink finish shutdown directly from its suspended state. - Retain DMA and interrupt-register clearing when the sun8i MAC reset times out, and return the original reset error. - Link to v3: https://patch.msgid.link/20260917-submit-h616-emac1-v1-v3-0-62cb8316e19b@gmail.com Changes in v3: - Add a prerequisite fix moving the MAC software reset to the DMA reset callback, after PHY initialization, so delayed module loading and deferred PHY probes do not tear down the MAC and its MDIO bus. - Preserve the H3 MDIO-mux reset and propagate hardware-reset failures through the normal stmmac hardware-setup error path. - Add Alastair D'Silva to Cc and rebase onto current net-next. - Link to v2: https://patch.msgid.link/20260915-submit-h616-emac1-v1-v2-0-322b32e40eb9@gmail.com Changes in v2: - Drop EMAC1 TX/RX clock-delay property support and keep the existing RGMII-only delay descriptions unchanged, as requested by Maxime Ripard. - Clarify that EMAC1 connects internally to a co-packaged PHY, not an external PHY or the H3-style internal-PHY controls. - Rebase onto current net-next. - Link to v1: https://patch.msgid.link/20260915-submit-h616-emac1-v1-v1-0-195de0bb1f8a@gmail.com To: Maxime Chevallier To: Andrew Lunn To: "David S. Miller" To: Eric Dumazet To: Jakub Kicinski To: Paolo Abeni To: Maxime Coquelin To: Alexandre Torgue To: Russell King To: Christian Marangi To: Chen-Yu Tsai To: Jernej Skrabec To: Samuel Holland To: Rob Herring To: Krzysztof Kozlowski To: Conor Dooley To: Maxime Ripard To: Giuseppe Cavallaro To: Jose Abreu To: Andrew Lunn To: Heiner Kallweit To: Tiezhu Yang To: Huacai Chen Cc: netdev@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-sunxi@lists.linux.dev Cc: devicetree@vger.kernel.org --- James Hilliard (6): net: phylink: allow stopping a suspended instance net: stmmac: close the interface after a failed MTU reopen net: stmmac: close the interface after failed hardware resume net: stmmac: sun8i: reset the MAC after PHY initialization dt-bindings: net: allwinner: add H616 EMAC1 net: stmmac: sun8i: add support for Allwinner H616 EMAC1 .../bindings/net/allwinner,sun8i-a83t-emac.yaml | 13 ++++ .../devicetree/bindings/net/snps,dwmac.yaml | 2 + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 69 +++++++++++++--------- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 2 + drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 30 +++++++--- drivers/net/phy/phylink.c | 16 +++++ 6 files changed, 98 insertions(+), 34 deletions(-) --- base-commit: 8830e65ed46de41f849eefb8ba227d4852c460f6 change-id: 20260914-submit-h616-emac1-v1-143703842abb Best regards, -- James Hilliard