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Mon, 21 Sep 2026 08:36:52 -0700 (PDT) X-Received: by 2002:a05:6102:1624:b0:7a2:3feb:9c55 with SMTP id ada2fe7eead31-7a55b74983bmr5853945137.12.1790005012400; Mon, 21 Sep 2026 08:36:52 -0700 (PDT) Received: from QCOM-eG0v1AUPpu.na.qualcomm.com ([2a01:e0a:830:450:d5b5:76d2:82e3:e5fb]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fcd07bba7sm231054065e9.9.2026.09.21.08.36.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2026 08:36:51 -0700 (PDT) From: Loic Poulain Date: Mon, 21 Sep 2026 17:36:28 +0200 Subject: [PATCH v8 8/9] arm64: dts: qcom: shikra: Add OPE node Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260921-camss-isp-ope-v8-8-dd1c86a3c8a0@oss.qualcomm.com> References: <20260921-camss-isp-ope-v8-0-dd1c86a3c8a0@oss.qualcomm.com> In-Reply-To: <20260921-camss-isp-ope-v8-0-dd1c86a3c8a0@oss.qualcomm.com> To: Mauro Carvalho Chehab , Bryan O'Donoghue , Vladimir Zapolskiy , Loic Poulain , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kees Cook , "Gustavo A. R. Silva" , Bjorn Andersson , Konrad Dybcio , Bryan O'Donoghue Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-hardening@vger.kernel.org, Nihal Kumar Gupta , Abel Vesa X-Mailer: b4 0.14.2 X-Proofpoint-GUID: ZeKBMCAoFFmp0eRy6WOacBE_T8Y8LBEB X-Proofpoint-ORIG-GUID: ZeKBMCAoFFmp0eRy6WOacBE_T8Y8LBEB X-Authority-Analysis: v=2.4 cv=OtraWC/t c=1 sm=1 tr=0 ts=6ab14f16 cx=c_pps a=R6oCqFB+Yf/t2GF8e0/dFg==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=EzCDy3pf2FPqfMyO2-oA:9 a=QEXdDO2ut3YA:10 a=TD8TdBvy0hsOASGTdmB-:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIxMDIyNyBTYWx0ZWRfX8KHgQqS2RGxQ UI5FzbAuMaxrS1Ruc93l7Nh3flwuxnlOEGzMinhWPFnwXTVtpnvFHtjFaOOZKspUynXzXQnL+P3 +ooctR23wVo9eKU3yGbfODDUwREZPaqtA9GJuI/CVpwSzccRKVFkoKIzQzz584+dLDAFgALCDEZ zuF09uj8CUxVCuEuBX6cHoqQQtREx5rn+p35U8uJJHecPdozK4dpXp4wPtFwqe8w65Mt9nr1gM8 jreBPxbqtqRqdBveNFq08ye8QgOkcS4nbWfMLJqwsajHPEHNvfWrsFbyCqKXFDgrSPrZM1SHOGg kw60gPlNPmuUzwokFYsPRU9xrTxdUoDY5CScN0yMx41X4o3ZCbaBjzapOpeEOs5Ok3esKjE/Q8e XIwjiH7R6kd0YDjpuZbWrJjLB18BBXK2SbXn5GFsyazLUr4HSDAKFrnPiWkNlXJWoxitRmgzbiU RcnxO5sFh3bMn9OA6dg== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIxMDIyNyBTYWx0ZWRfXxh//yyEEd18s Sii+Dsl79Fv66LE2cdWC5bbaSlva1jHzfvbEpjzzJzan5FpEYgumTcum5BIg2YQRnVE/OeMFXsc udJV8oocOsQUNrqYJctlVQySpNbAYgA= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-21_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 lowpriorityscore=0 bulkscore=0 suspectscore=0 malwarescore=0 adultscore=0 phishscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609210227 From: Nihal Kumar Gupta Add the Offline Processing Engine (OPE) device tree node for Shikra. The node describes the six register regions (cdm, top, qos, pipeline, bus_read, bus_write), clocks, interrupt, interconnects, IOMMU mappings, and OPP table. OPE is a memory-to-memory block with no board-level dependencies, so the node is left enabled for all Shikra boards. Signed-off-by: Nihal Kumar Gupta Reviewed-by: Abel Vesa Signed-off-by: Loic Poulain --- arch/arm64/boot/dts/qcom/shikra.dtsi | 77 ++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi index 92d22e3b6931cf49f213d1807f78fc1a261f290d..5adc28e9aa64508366e6c7fdad191a152b8cb6dc 100644 --- a/arch/arm64/boot/dts/qcom/shikra.dtsi +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi @@ -1828,6 +1828,83 @@ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, }; }; + isp_ope: isp@5c42000 { + compatible = "qcom,shikra-camss-ope", "qcom,qcm2290-camss-ope"; + + reg = <0x0 0x5c42000 0x0 0x400>, + <0x0 0x5c42400 0x0 0x200>, + <0x0 0x5c42600 0x0 0x200>, + <0x0 0x5c42800 0x0 0x4400>, + <0x0 0x5c46c00 0x0 0x190>, + <0x0 0x5c46d90 0x0 0xa00>; + reg-names = "cdm", + "top", + "qos", + "pipeline", + "bus_read", + "bus_write"; + + clocks = <&gcc GCC_CAMSS_AXI_CLK>, + <&gcc GCC_CAMSS_OPE_CLK>, + <&gcc GCC_CAMSS_OPE_AHB_CLK>, + <&gcc GCC_CAMSS_NRT_AXI_CLK>, + <&gcc GCC_CAMSS_TOP_AHB_CLK>; + clock-names = "axi", + "core", + "iface", + "nrt", + "top"; + + interrupts = ; + + interconnects = <&mem_noc MASTER_AMPSS_M0 RPM_ACTIVE_TAG + &config_noc SLAVE_CAMERA_CFG RPM_ACTIVE_TAG>, + <&mmnrt_virt MASTER_CAMNOC_SF RPM_ALWAYS_TAG + &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; + interconnect-names = "config", + "data"; + + iommus = <&apps_smmu 0x600 0x0>, + <&apps_smmu 0x620 0x0>, + <&apps_smmu 0x640 0x0>; + + operating-points-v2 = <&ope_opp_table>; + power-domains = <&gcc GCC_CAMSS_TOP_GDSC>, + <&rpmpd RPMPD_VDDCX>; + power-domain-names = "camss", + "cx"; + + ope_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-19200000 { + opp-hz = /bits/ 64 <19200000>; + required-opps = <&rpmpd_opp_min_svs>; + }; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + required-opps = <&rpmpd_opp_svs>; + }; + + opp-266600000 { + opp-hz = /bits/ 64 <266600000>; + required-opps = <&rpmpd_opp_svs_plus>; + }; + + opp-465000000 { + opp-hz = /bits/ 64 <465000000>; + required-opps = <&rpmpd_opp_nom>; + }; + + opp-580000000 { + opp-hz = /bits/ 64 <580000000>; + required-opps = <&rpmpd_opp_turbo>; + turbo-mode; + }; + }; + }; + remoteproc_mpss: remoteproc@6080000 { compatible = "qcom,shikra-mpss-pas"; reg = <0x0 0x06080000 0x0 0x100>; -- 2.34.1