From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 219D336B92C; Mon, 21 Sep 2026 04:23:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789964614; cv=none; b=hphzNSUYXZnl2/V/0V/J/RZtFRDTBH7y4x4fsKIsq/wpt4lV6wzQ/nQjufBCUb0O+QEpLNu+LHPzucYm7pBC46SRgj3OThHjn1cv2MEDyXM/EcjeCv1KzzL1t4D/cX7ZgKJ+h+74owe2q6xnXpkaNrKmSJ0wogPeMMSoH0FDvow= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789964614; c=relaxed/simple; bh=ELqcw3LBSmBtItQm8aQ9QzI3Xq97N7afNTnfipf3dIo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=l2VA5EOuxzT0f736H6Ur60E/aYk4XWK4RvEW8x1/y/NEYFVwSPpFNLHWsHtdYlUtsNGNHTUpU7eL/a+XkhEVsF509eb6VXEZe7/MuoYM/sm6v5LH2s0Wm+oI6UnGaWE5ySmwy1Cvq09fBp6iEsKTwl1inU2AnN7kiUypZJduXGw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hkGrnjqN; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hkGrnjqN" Received: by smtp.kernel.org (Postfix) with ESMTPS id D3174C2BD05; Mon, 21 Sep 2026 04:23:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789964613; bh=ELqcw3LBSmBtItQm8aQ9QzI3Xq97N7afNTnfipf3dIo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=hkGrnjqN2EScBr3rFVpYCEeHwdWf8lluL/mfolmfzaLQd+nKWGOHq6/UqRFJNHYHo HnCthIpUPc3ui/CRtWE3zu9uZMXkKxAvuYmPT18E3tHkGXCZ24kDn/piqp9gJEC2Nh SE5p4gUk3YhUDFYmnTx4jkXY3LarCfKrnjBRcBIQQHjTo8168MhPlH8RVr1/GSmexn mYe1FWAPeDhy1ZLIksE1T0MfC3FYWI09qfF7/YYs2iF+/TU0gojBbAve0ReOWklGy3 5BHW9cLdkMtEb0fy16ikJxpfs5AbCQU4YuJVLti3dDJ9aLWA0mKH0oluqfevwt42eU qNAq4xb4jYp9w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBEECC982F1; Mon, 21 Sep 2026 04:23:33 +0000 (UTC) From: Long Zhao via B4 Relay Date: Mon, 21 Sep 2026 12:23:33 +0800 Subject: [PATCH v8 14/18] gpio: pl061: add Ambarella register-layout variant Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260921-cv75-v5-v8-14-282ff5d98dda@ambarella.com> References: <20260921-cv75-v5-v8-0-282ff5d98dda@ambarella.com> In-Reply-To: <20260921-cv75-v5-v8-0-282ff5d98dda@ambarella.com> To: Arnd Bergmann , Krzysztof Kozlowski , Alexandre Belloni , soc@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: Long Zhao , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , Jerome Brunet , Linus Walleij , Bartosz Golaszewski , Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Catalin Marinas , Will Deacon , Long Zhao , Lee Jones , mfd@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789964608; l=3980; i=longzhao@ambarella.com; s=20260730; h=from:subject:message-id; bh=UJUD7yvQRDjUnxZn37u+jsf5HE3dcaqrKiM8weupWiY=; b=aqTvGbpbG0JFVzw6uqBtaNBvLqAtjHTQy6aHG8wAteDMBByBZz7cprSPfRRlH3juaq5VzSRDp 6E+eKojrlH8B7Dl98RytohYGgxKU8fs13hdrHdzAU/34rXsnlNtqTZC X-Developer-Key: i=longzhao@ambarella.com; a=ed25519; pk=/xGhPTOX0/eYsyTWzyjjgAIW1Z/YD+IlnOnvcdRozow= X-Endpoint-Received: by B4 Relay for longzhao@ambarella.com/20260730 with auth_id=903 X-Original-From: Long Zhao Reply-To: longzhao@ambarella.com From: Long Zhao Add a 32-bit, 32-line layout with DAT/DIR/IS/IBE/IEV/IE/MIS/IC plus MASK and ENABLE. Probe unmasks the bank and enables the controller. IRQ type changes also clear the pending bit. This derivative does not need write-after-direction or system suspend save/restore. Match the part with designer AMBA_VENDOR_AMBARELLA (JEP106 identity 0x68, bit 7 set) and part number 0x061. Reviewed-by: Andy Shevchenko Reviewed-by: Linus Walleij Signed-off-by: Long Zhao --- drivers/gpio/gpio-pl061.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++ include/linux/amba/bus.h | 1 + 2 files changed, 60 insertions(+) diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index 604129a68948..fc7269837af4 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -39,6 +39,18 @@ #define PL061_MIS 0x418 #define PL061_IC 0x41c +#define AMBARELLA_GPIO_NR 32 +#define AMBARELLA_DAT 0x00 +#define AMBARELLA_DIR 0x04 +#define AMBARELLA_IS 0x08 +#define AMBARELLA_IBE 0x0c +#define AMBARELLA_IEV 0x10 +#define AMBARELLA_IE 0x14 +#define AMBARELLA_MIS 0x20 +#define AMBARELLA_IC 0x24 +#define AMBARELLA_MASK 0x28 +#define AMBARELLA_ENABLE 0x2c + struct pl061_regs { unsigned int dat; unsigned int dir; @@ -335,6 +347,18 @@ static bool pl061_arm_volatile_reg(struct device *dev, unsigned int reg) } } +static bool pl061_ambarella_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case AMBARELLA_DAT: + case AMBARELLA_MIS: + case AMBARELLA_IC: + return true; + default: + return false; + } +} + static const struct regmap_config pl061_arm_regmap_config = { .reg_bits = 16, .val_bits = 8, @@ -346,6 +370,16 @@ static const struct regmap_config pl061_arm_regmap_config = { .use_raw_spinlock = true, }; +static const struct regmap_config pl061_ambarella_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = AMBARELLA_ENABLE, + .volatile_reg = pl061_ambarella_volatile_reg, + .fast_io = true, + .use_raw_spinlock = true, +}; + static const struct pl061_regs pl061_arm_regs = { .dir = PL061_DIR, .is = PL061_IS, @@ -356,6 +390,19 @@ static const struct pl061_regs pl061_arm_regs = { .ic = PL061_IC, }; +static const struct pl061_regs pl061_ambarella_regs = { + .dat = AMBARELLA_DAT, + .dir = AMBARELLA_DIR, + .is = AMBARELLA_IS, + .ibe = AMBARELLA_IBE, + .iev = AMBARELLA_IEV, + .ie = AMBARELLA_IE, + .mis = AMBARELLA_MIS, + .ic = AMBARELLA_IC, + .mask = AMBARELLA_MASK, + .enable = AMBARELLA_ENABLE, +}; + static const struct pl061_drvdata pl061_arm = { .regmap_config = &pl061_arm_regmap_config, .regs = &pl061_arm_regs, @@ -365,6 +412,13 @@ static const struct pl061_drvdata pl061_arm = { .reg_mask_xlate = pl061_arm_reg_mask_xlate, }; +static const struct pl061_drvdata pl061_ambarella = { + .regmap_config = &pl061_ambarella_regmap_config, + .regs = &pl061_ambarella_regs, + .ngpio = AMBARELLA_GPIO_NR, + .clear_irq_on_type = true, +}; + static int pl061_probe(struct amba_device *adev, const struct amba_id *id) { struct device *dev = &adev->dev; @@ -533,6 +587,11 @@ static const struct amba_id pl061_ids[] = { .mask = 0x000fffff, .data = (void *)&pl061_arm, }, + { + .id = (AMBA_VENDOR_AMBARELLA << 12) | 0x061, + .mask = 0x000fffff, + .data = (void *)&pl061_ambarella, + }, { 0, 0 }, }; MODULE_DEVICE_TABLE(amba, pl061_ids); diff --git a/include/linux/amba/bus.h b/include/linux/amba/bus.h index 80a74cd2da7e..411533bfa61d 100644 --- a/include/linux/amba/bus.h +++ b/include/linux/amba/bus.h @@ -98,6 +98,7 @@ enum amba_vendor { AMBA_VENDOR_ST = 0x80, AMBA_VENDOR_QCOM = 0x51, AMBA_VENDOR_LSI = 0xb6, + AMBA_VENDOR_AMBARELLA = 0xe8, }; extern const struct bus_type amba_bustype; -- 2.34.1