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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33c331d3f2csm14091444eec.28.2026.09.20.23.19.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Sep 2026 23:19:45 -0700 (PDT) From: Kathiravan Thirumoorthy Subject: [PATCH 00/11] Add a few minor enhancements to the Qualcomm IPQ GCC drivers. Date: Mon, 21 Sep 2026 11:49:33 +0530 Message-Id: <20260921-ipq_clk_changes-v1-0-d242e3d49648@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAHXMsGoC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIzMDCyNT3cyCwvjknOx4iGyxbpqhUZqBmZGhpaGlsRJQV0FRalpmBdjE6Fg Iv7g0KSs1uQRkjFJtLQDbSSRmcwAAAA== X-Change-ID: 20260825-ipq_clk_changes-f12f06219193 To: Bjorn Andersson , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Georgi Djakov , Konrad Dybcio , Varadarajan Narayanan , Dmitry Baryshkov , Abel Vesa , Gokul Sriram Palanisamy , Sricharan Ramabadhran , Kathiravan T Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Kathiravan Thirumoorthy , stable@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.15.2 X-Authority-Analysis: v=2.4 cv=HIZWhYtv c=1 sm=1 tr=0 ts=6ab0cc83 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=bMZdg2PHOV3iVps5Te4A:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIxMDA4OSBTYWx0ZWRfX41ceWqTZ1jcw gWlRJT4M/1scjESJY5LKRvszPpuiOKU5Ta1uSWgi39vgaXqKvceOoL2xhkjlyDvDVpk/2XS4nLZ zpl/HX3TAXWynFhh+Ar2tDMC2zqEPUE= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIxMDA4OSBTYWx0ZWRfXzfyZyZqZ08eZ olxkpB+h8sxudlaM8JYHOonIvYS6BRloaZP3VR/EIlxQEuj34b5F3AvQksGbDQzAwRXP5Vo0bLE TzcPBupIcKYjdVC0UHF8AQJdMZCaoCTCqR8YZEnTmVv2rmLQwFSBnW1yw09X4MiKjBq5IvQIQPw P29p3SIiRqUdVdGmIVHARdeRtoropTvHsBjze7FWrQby8qlIIOis15U4Wmx7SreeFzpFvb/GzvU GwzbOYiMESWEMfts6EgCAzbn8Pe8JDMxukQ4ljfp4cIQkJ6pp8wIUTI2fJwUwhW5dUtczXoRo72 wAHjaGS2QJaLu5qc6tKrnV6tiSb/DX/JL3RizJSMyR2jaBnt2/oIVxKfZYwl5IiePxwUQR9SJY+ 1NN8Qp80aLQYnjgY3IL12XFdbJfD64j5ucaF3tiMbxW+p5NdWUz/g1NL5ZMUSigmr8ze0LL0XfC E8kXZAd4vHLxrS+vrfg== X-Proofpoint-ORIG-GUID: MGtm6MmtcF5K0s1GWPALn1l5WMl0wA0O X-Proofpoint-GUID: MGtm6MmtcF5K0s1GWPALn1l5WMl0wA0O X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-21_02,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 spamscore=0 priorityscore=1501 suspectscore=0 phishscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609210089 This series adds USB, NSS, and clock-related updates for several Qualcomm IPQ SoCs, including: - Configure the USB UTMI reference clock to 24 MHz on IPQ5018, IPQ5210, and IPQ5332 to fix USB enumeration issues. - Wire the USB3 PHY PIPE clocks to GCC on IPQ5424 and IPQ9574. - Add NSS MEMNOC clocks and corresponding clock and ICC IDs for IPQ5424. - Connect the IPQ5424 PPE clock to GCC and document the required clock input ordering. - Add UNIPHY XPCS reset definitions required for NSS support on IPQ5210. - Fix IPA-related typos in the IPQ5424 APSS clock driver. Signed-off-by: Kathiravan Thirumoorthy --- Kathiravan Thirumoorthy (11): clk: qcom: ipq5018: add 24MHz rate for USB UTMI clock clk: qcom: ipq5332: add 24MHz rate for USB UTMI clock clk: qcom: ipq5210: add 24MHz rate for USB UTMI clock arm64: dts: qcom: ipq9574: Wire up USB3 PHY PIPE clock to GCC dt-bindings: clock: qcom: ipq5332-gcc: Describe clock inputs per compatible arm64: dts: qcom: ipq5424: Wire up USB3 PHY PIPE clock to GCC dt-bindings: qcom,ipq5424: add NSS MEMNOC clock and ICC IDs clk: qcom: gcc-ipq5424: add the MEMNOC clocks needed for the NSS block arm64: dts: qcom: ipq5424: Wire up PPE clock to GCC clk: qcom: gcc-ipq5210: add UNIPHY XPCS reset entries clk: qcom: apss-ipq5424: fix 'ipa' typos .../bindings/clock/qcom,ipq5332-gcc.yaml | 26 +++--- arch/arm64/boot/dts/qcom/ipq5424.dtsi | 3 +- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 2 +- drivers/clk/qcom/apss-ipq5424.c | 10 +-- drivers/clk/qcom/gcc-ipq5018.c | 1 + drivers/clk/qcom/gcc-ipq5210.c | 4 + drivers/clk/qcom/gcc-ipq5332.c | 1 + drivers/clk/qcom/gcc-ipq5424.c | 93 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,ipq5424-gcc.h | 4 + include/dt-bindings/interconnect/qcom,ipq5424.h | 4 + 10 files changed, 131 insertions(+), 17 deletions(-) --- base-commit: 3f2425f5b5bbbdd991ca9cdfd5502e68d8895998 change-id: 20260825-ipq_clk_changes-f12f06219193 Best regards, -- Kathiravan Thirumoorthy