Re: [PATCH 6/6] arm64: qcom: monaco: Add PCIe Endpoint nodes

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dts: qcom: spurious PCIe WAKE# assertion due to output-low
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commit e087a4ad529c59501ceaa5d2b1a9d03392103204
Author: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>

arm64: qcom: monaco: Add PCIe Endpoint nodes

This commit adds two PCIe controllers that can operate in Endpoint mode for
Monaco. It describes the Endpoint nodes for both controllers, including their
register regions, clocks, interrupts, interconnects, and PHY connections.

> diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
> index d7d135e87a8c7..8f2f0941383aa 100644
> --- a/arch/arm64/boot/dts/qcom/monaco.dtsi
> +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi

[ ... ]

> @@ -6225,6 +6323,52 @@ tlmm: pinctrl@f100000 {
>  			#interrupt-cells = <2>;
>  			wakeup-parent = <&pdc>;
>  
> +			pcie0_ep_default_state: pcie0-ep-default-state {
> +				wake-pins {
> +					pins = "gpio0";
> +					function = "gpio";
> +					drive-strength = <2>;
> +					output-low;

[Severity: Medium]
Will configuring this pin as output-low cause a spurious PCIe WAKE# assertion?

Since the endpoint nodes omit wake-gpios, the endpoint driver in
drivers/pci/controller/dwc/pcie-qcom-ep.c will not request the GPIO to
logically de-assert it. Because this configures the pin to output 0V, won't
the active-low WAKE# signal remain permanently driven low by default?

This could cause the endpoint to continuously assert the WAKE# signal to the
host, potentially preventing the host from sleeping or causing a wake
interrupt storm.

> +				};
> +
> +				clkreq-pins {

[ ... ]

> +			pcie1_ep_default_state: pcie1-ep-default-state {
> +				wake-pins {
> +					pins = "gpio21";
> +					function = "gpio";
> +					drive-strength = <2>;
> +					output-low;

[Severity: Medium]
Does this have the same continuous WAKE# assertion issue as
pcie0_ep_default_state above?

> +				};
> +
> +				clkreq-pins {

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260921-monaco_ep-v1-0-63c5282fb0db@oss.qualcomm.com?part=6