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This will support platforms that do not have tisci firmware like AM62L. Signed-off-by: Sai Sree Kartheek Adivi --- drivers/soc/ti/k3-ringacc.c | 177 ++++++++++++++++++++++++++---- include/linux/soc/ti/k3-ringacc.h | 18 +++ 2 files changed, 176 insertions(+), 19 deletions(-) diff --git a/drivers/soc/ti/k3-ringacc.c b/drivers/soc/ti/k3-ringacc.c index 5966db4327b13..0ef07207e1dfa 100644 --- a/drivers/soc/ti/k3-ringacc.c +++ b/drivers/soc/ti/k3-ringacc.c @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -46,6 +47,53 @@ struct k3_ring_rt_regs { u32 hwindx; }; +#define K3_RINGACC_RT_CFG_REGS_OFS 0x40 +#define K3_DMARING_CFG_ADDR_HI_MASK GENMASK(3, 0) +#define K3_DMARING_CFG_ASEL_SHIFT 16 +#define K3_DMARING_CFG_SIZE_MASK GENMASK(15, 0) + +/** + * struct k3_ring_cfg_regs - The RA Configuration Registers region + * + * @ba_lo: Ring Base Address Low Register + * @ba_hi: Ring Base Address High Register + * @size: Ring Size Register + */ +struct k3_ring_cfg_regs { + u32 ba_lo; + u32 ba_hi; + u32 size; +}; + +#define K3_RINGACC_RT_INT_REGS_OFS 0x140 +#define K3_RINGACC_RT_INT_ENABLE_SET_COMPLETE BIT(0) +#define K3_RINGACC_RT_INT_ENABLE_SET_TR BIT(2) + +/** + * struct k3_ring_intr_regs { + * + * @enable_set: Ring Interrupt Enable Register + * @resv_1: Reserved + * @clr: Ring Interrupt Clear Register + * @resv_2: Reserved + * @status_set: Ring Interrupt Status Set Register + * @resv_3: Reserved + * @status: Ring Interrupt Status Register + * @resv_4: Reserved + * @status_masked: Ring Interrupt Status Masked Register + */ +struct k3_ring_intr_regs { + u32 enable_set; + u32 resv_1; + u32 clr; + u32 resv_2; + u32 status_set; + u32 resv_3; + u32 status; + u32 resv_4; + u32 status_masked; +}; + #define K3_RINGACC_RT_REGS_STEP 0x1000 #define K3_DMARING_RT_REGS_STEP 0x2000 #define K3_DMARING_RT_REGS_REVERSE_OFS 0x1000 @@ -139,6 +187,8 @@ struct k3_ring_state { * struct k3_ring - RA Ring descriptor * * @rt: Ring control/status registers + * @cfg: Ring config registers + * @intr: Ring interrupt registers * @fifos: Ring queues registers * @proxy: Ring Proxy Datapath registers * @ring_mem_dma: Ring buffer dma address @@ -158,6 +208,8 @@ struct k3_ring_state { */ struct k3_ring { struct k3_ring_rt_regs __iomem *rt; + struct k3_ring_cfg_regs __iomem *cfg; + struct k3_ring_intr_regs __iomem *intr; struct k3_ring_fifo_regs __iomem *fifos; struct k3_ringacc_proxy_target_regs __iomem *proxy; dma_addr_t ring_mem_dma; @@ -467,15 +519,37 @@ static void k3_ringacc_ring_reset_sci(struct k3_ring *ring) struct k3_ringacc *ringacc = ring->parent; int ret; - ring_cfg.nav_id = ringacc->tisci_dev_id; - ring_cfg.index = ring->ring_id; - ring_cfg.valid_params = TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID; - ring_cfg.count = ring->size; + if (!ringacc->tisci) { + u32 reg; - ret = ringacc->tisci_ring_ops->set_cfg(ringacc->tisci, &ring_cfg); - if (ret) - dev_err(ringacc->dev, "TISCI reset ring fail (%d) ring_idx %d\n", - ret, ring->ring_id); + if (!ring->cfg) + return; + + reg = readl(&ring->cfg->size); + reg &= ~K3_DMARING_CFG_SIZE_MASK; + writel(reg, &ring->cfg->size); + + ret = readl_poll_timeout(&ring->cfg->size, reg, + !(reg & K3_DMARING_CFG_SIZE_MASK), + 1, 100); + if (ret) + dev_err(ringacc->dev, "ring %d size clear timeout\n", + ring->ring_id); + + reg = readl(&ring->cfg->size); + reg |= ring->size; + writel(reg, &ring->cfg->size); + } else { + ring_cfg.nav_id = ringacc->tisci_dev_id; + ring_cfg.index = ring->ring_id; + ring_cfg.valid_params = TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID; + ring_cfg.count = ring->size; + + ret = ringacc->tisci_ring_ops->set_cfg(ringacc->tisci, &ring_cfg); + if (ret) + dev_err(ringacc->dev, "TISCI reset ring fail (%d) ring_idx %d\n", + ret, ring->ring_id); + } } void k3_ringacc_ring_reset(struct k3_ring *ring) @@ -501,6 +575,9 @@ static void k3_ringacc_ring_reconfig_qmode_sci(struct k3_ring *ring, ring_cfg.valid_params = TI_SCI_MSG_VALUE_RM_RING_MODE_VALID; ring_cfg.mode = mode; + if (!ringacc->tisci) + return; + ret = ringacc->tisci_ring_ops->set_cfg(ringacc->tisci, &ring_cfg); if (ret) dev_err(ringacc->dev, "TISCI reconf qmode fail (%d) ring_idx %d\n", @@ -576,10 +653,25 @@ static void k3_ringacc_ring_free_sci(struct k3_ring *ring) ring_cfg.index = ring->ring_id; ring_cfg.valid_params = TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER; - ret = ringacc->tisci_ring_ops->set_cfg(ringacc->tisci, &ring_cfg); - if (ret) - dev_err(ringacc->dev, "TISCI ring free fail (%d) ring_idx %d\n", - ret, ring->ring_id); + if (!ringacc->tisci) { + u32 reg; + + writel(ring_cfg.addr_lo, &ring->cfg->ba_lo); + writel((ring_cfg.addr_hi & K3_DMARING_CFG_ADDR_HI_MASK) + + (ring_cfg.asel << K3_DMARING_CFG_ASEL_SHIFT), + &ring->cfg->ba_hi); + + reg = readl(&ring->cfg->size); + reg &= ~K3_DMARING_CFG_SIZE_MASK; + reg |= ring_cfg.count & K3_DMARING_CFG_SIZE_MASK; + + writel(reg, &ring->cfg->size); + } else { + ret = ringacc->tisci_ring_ops->set_cfg(ringacc->tisci, &ring_cfg); + if (ret) + dev_err(ringacc->dev, "TISCI ring free fail (%d) ring_idx %d\n", + ret, ring->ring_id); + } } int k3_ringacc_ring_free(struct k3_ring *ring) @@ -670,15 +762,36 @@ int k3_ringacc_get_ring_irq_num(struct k3_ring *ring) } EXPORT_SYMBOL_GPL(k3_ringacc_get_ring_irq_num); +u32 k3_ringacc_ring_get_irq_status(struct k3_ring *ring) +{ + struct k3_ringacc *ringacc = ring->parent; + struct k3_ring *fwd_ring = &ringacc->rings[ring->ring_id]; + + if (!fwd_ring->intr) + return 0; + + return readl(&fwd_ring->intr->status); +} +EXPORT_SYMBOL_GPL(k3_ringacc_ring_get_irq_status); + +void k3_ringacc_ring_clear_irq(struct k3_ring *ring, u32 status) +{ + struct k3_ringacc *ringacc = ring->parent; + struct k3_ring *fwd_ring = &ringacc->rings[ring->ring_id]; + + if (!fwd_ring->intr) + return; + + writel(status, &fwd_ring->intr->status); +} +EXPORT_SYMBOL_GPL(k3_ringacc_ring_clear_irq); + static int k3_ringacc_ring_cfg_sci(struct k3_ring *ring) { struct ti_sci_msg_rm_ring_cfg ring_cfg = { 0 }; struct k3_ringacc *ringacc = ring->parent; int ret; - if (!ringacc->tisci) - return -EINVAL; - ring_cfg.nav_id = ringacc->tisci_dev_id; ring_cfg.index = ring->ring_id; ring_cfg.valid_params = TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER; @@ -689,6 +802,24 @@ static int k3_ringacc_ring_cfg_sci(struct k3_ring *ring) ring_cfg.size = ring->elm_size; ring_cfg.asel = ring->asel; + if (!ringacc->tisci) { + u32 reg; + + writel(ring_cfg.addr_lo, &ring->cfg->ba_lo); + writel((ring_cfg.addr_hi & K3_DMARING_CFG_ADDR_HI_MASK) + + (ring_cfg.asel << K3_DMARING_CFG_ASEL_SHIFT), + &ring->cfg->ba_hi); + + reg = readl(&ring->cfg->size); + reg &= ~K3_DMARING_CFG_SIZE_MASK; + reg |= ring_cfg.count & K3_DMARING_CFG_SIZE_MASK; + + writel(reg, &ring->cfg->size); + writel(K3_RINGACC_RT_INT_ENABLE_SET_COMPLETE | K3_RINGACC_RT_INT_ENABLE_SET_TR, + &ring->intr->enable_set); + return 0; + } + ret = ringacc->tisci_ring_ops->set_cfg(ringacc->tisci, &ring_cfg); if (ret) dev_err(ringacc->dev, "TISCI config ring fail (%d) ring_idx %d\n", @@ -1481,9 +1612,12 @@ struct k3_ringacc *k3_ringacc_dmarings_init(struct platform_device *pdev, mutex_init(&ringacc->req_lock); - base_rt = devm_platform_ioremap_resource_byname(pdev, "ringrt"); - if (IS_ERR(base_rt)) - return ERR_CAST(base_rt); + base_rt = data->base_rt; + if (!base_rt) { + base_rt = devm_platform_ioremap_resource_byname(pdev, "ringrt"); + if (IS_ERR(base_rt)) + return ERR_CAST(base_rt); + } ringacc->rings = devm_kzalloc(dev, sizeof(*ringacc->rings) * @@ -1499,6 +1633,10 @@ struct k3_ringacc *k3_ringacc_dmarings_init(struct platform_device *pdev, struct k3_ring *ring = &ringacc->rings[i]; ring->rt = base_rt + K3_DMARING_RT_REGS_STEP * i; + ring->cfg = base_rt + K3_RINGACC_RT_CFG_REGS_OFS + + K3_DMARING_RT_REGS_STEP * i; + ring->intr = base_rt + K3_RINGACC_RT_INT_REGS_OFS + + K3_DMARING_RT_REGS_STEP * i; ring->parent = ringacc; ring->ring_id = i; ring->proxy_id = K3_RINGACC_PROXY_NOT_USED; @@ -1512,7 +1650,8 @@ struct k3_ringacc *k3_ringacc_dmarings_init(struct platform_device *pdev, ring->flags = K3_RING_FLAG_REVERSE; } - ringacc->tisci_ring_ops = &ringacc->tisci->ops.rm_ring_ops; + if (ringacc->tisci) + ringacc->tisci_ring_ops = &ringacc->tisci->ops.rm_ring_ops; dev_info(dev, "Number of rings: %u\n", ringacc->num_rings); diff --git a/include/linux/soc/ti/k3-ringacc.h b/include/linux/soc/ti/k3-ringacc.h index 39b022b925986..4b6ec925e2f2d 100644 --- a/include/linux/soc/ti/k3-ringacc.h +++ b/include/linux/soc/ti/k3-ringacc.h @@ -158,6 +158,23 @@ u32 k3_ringacc_get_ring_id(struct k3_ring *ring); */ int k3_ringacc_get_ring_irq_num(struct k3_ring *ring); +/** + * k3_ringacc_ring_get_irq_status - Get the irq status for the ring + * @ring: pointer on ring + * + * Returns the interrupt status + */ +u32 k3_ringacc_ring_get_irq_status(struct k3_ring *ring); + +/** + * k3_ringacc_ring_clear_irq - Clear the given interrupts + * @ring: pointer on ring + * @status: mask of interrupt status bits to clear + * + * Clears only the interrupt status bits set in @status on the ring + */ +void k3_ringacc_ring_clear_irq(struct k3_ring *ring, u32 status); + /** * k3_ringacc_ring_cfg - ring configure * @ring: pointer on ring @@ -262,6 +279,7 @@ struct k3_ringacc_init_data { const struct ti_sci_handle *tisci; u32 tisci_dev_id; u32 num_rings; + void __iomem *base_rt; }; struct k3_ringacc *k3_ringacc_dmarings_init(struct platform_device *pdev, -- 2.54.0