[PATCH 0/4] clk: qcom: Add LPASS clock/reset controllers for Glymur

[Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>]

Add DT bindings and clock-controller drivers for the two LPASS reset
providers on the Glymur SoC:

  - qcom,glymur-lpassaudiocc  (LPASS Audio CC CSR): RX + WSA1..WSA4
    SoundWire CGCR resets
  - qcom,glymur-lpasscc       (LPASS CC CSR):       TX SoundWire CGCR
    reset

Only resets are exposed for now; the Q6DSP owns LPASS clocks via the
Q6PRM service on the GPR rpmsg channel, matching the existing SC8280XP
pattern (commits a5c9c3ba243a, c2ef1ec97c1f).

The reset providers are required by the LPASS audio macros and the
SoundWire controller to come out of reset on Glymur.

Srinivas Kandagatla (4):
  dt-bindings: clock: Add LPASS AUDIOCC and reset controller for Glymur
  dt-bindings: clock: Add LPASSCC and reset controller for Glymur
  clk: qcom: Add lpass audio clock controller driver for Glymur
  clk: qcom: Add lpass clock controller driver for Glymur

 .../bindings/clock/qcom,glymur-lpasscc.yaml   | 60 ++++++++++++
 drivers/clk/qcom/Kconfig                      | 11 +++
 drivers/clk/qcom/Makefile                     |  1 +
 drivers/clk/qcom/lpasscc-glymur.c             | 91 +++++++++++++++++++
 .../dt-bindings/clock/qcom,glymur-lpasscc.h   | 19 ++++
 5 files changed, 182 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,glymur-lpasscc.yaml
 create mode 100644 drivers/clk/qcom/lpasscc-glymur.c
 create mode 100644 include/dt-bindings/clock/qcom,glymur-lpasscc.h

-- 
2.53.0