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In particular, the H.265 decoder persistent buffer needs space for SEI unregistered userdata and three-dimensional userdata, and the encoder calculations use a larger lambda LUT size. Add a VPU5x buffer-size dispatcher and a VPU5x-specific H.265 persistent buffer calculation while reusing the existing helpers for buffer types whose formulas are unchanged. Signed-off-by: Wangao Wang --- drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 93 ++++++++++++++++++++++ drivers/media/platform/qcom/iris/iris_vpu_buffer.h | 4 +- 2 files changed, 96 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c index bb8135bd238b670fb5806120493b2603d9c2b0fb..cd00785a04870620c04bc4b52b35eda3c730bc93 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c @@ -1895,6 +1895,54 @@ static u32 iris_vpu4x_dec_persist_size(struct iris_inst *inst) return 0; } +static u32 hfi_vpu5x_buffer_persist_h265d(bool rpu_enabled) +{ + u32 slist_buf = SIZE_SLIST_BUF_H265 * NUM_SLIST_BUF_H265; + u32 frame_info = H265_NUM_FRM_INFO * H265_DISPLAY_BUF_SIZE; + u32 tile_info = H265_NUM_TILE * sizeof(u32); + u32 per_pic = NUM_HW_PIC_BUF * + (SIZE_SEI_USERDATA + SIZE_SEI_USERDATA_UNREGISTERED + SIZE_H265D_ARP + + SIZE_THREE_DIMENSION_USERDATA); + u32 dolby_rpu = rpu_enabled * NUM_HW_PIC_BUF * SIZE_DOLBY_RPU_METADATA; + + return ALIGN(slist_buf + frame_info + tile_info + per_pic + dolby_rpu, DMA_ALIGNMENT); +} + +static u32 hfi_vpu5x_buffer_persist_av1d(u32 max_width, u32 max_height, u32 total_ref_count) +{ + u32 comv_size = hfi_buffer_comv_av1d(max_width, max_height, total_ref_count); + u32 seq_hdr = SIZE_AV1D_SEQUENCE_HEADER * 2 + SIZE_AV1D_METADATA; + u32 per_pic = AV1D_NUM_HW_PIC_BUF * + (SIZE_AV1D_TILE_OFFSET + SIZE_AV1D_QM + SIZE_AV1D_ARP + SIZE_AV1D_METADATA); + u32 frame_hdr = AV1D_NUM_FRAME_HEADERS * + (SIZE_AV1D_FRAME_HEADER + 2 * SIZE_AV1D_PROB_TABLE); + + return ALIGN(seq_hdr + per_pic + frame_hdr + comv_size + HDR10_HIST_EXTRADATA_SIZE, + DMA_ALIGNMENT); +} + +static u32 iris_vpu5x_dec_persist_size(struct iris_inst *inst) +{ + struct platform_inst_caps *caps; + + if (inst->codec == V4L2_PIX_FMT_H264) { + return hfi_buffer_persist_h264d(); + } else if (inst->codec == V4L2_PIX_FMT_HEVC) { + return hfi_vpu5x_buffer_persist_h265d(0); + } else if (inst->codec == V4L2_PIX_FMT_VP9) { + return hfi_vpu4x_buffer_persist_vp9d(); + } else if (inst->codec == V4L2_PIX_FMT_AV1) { + caps = inst->core->iris_platform_data->inst_caps; + if (inst->fw_caps[DRAP].value) + return hfi_vpu5x_buffer_persist_av1d(caps->max_frame_width, + caps->max_frame_height, 16); + else + return hfi_vpu5x_buffer_persist_av1d(0, 0, 0); + } + + return 0; +} + static u32 size_se_lb(u32 standard, u32 num_vpp_pipes_enc, u32 frame_width_coded, u32 frame_height_coded) { @@ -2222,6 +2270,51 @@ u32 iris_vpu4x_buf_size(struct iris_inst *inst, enum iris_buffer_type buffer_typ return size; } +u32 iris_vpu5x_buf_size(struct iris_inst *inst, enum iris_buffer_type buffer_type) +{ + const struct iris_vpu_buf_type_handle *buf_type_handle_arr = NULL; + u32 size = 0, buf_type_handle_size = 0, i; + + static const struct iris_vpu_buf_type_handle dec_internal_buf_type_handle[] = { + {BUF_BIN, iris_vpu_dec_bin_size }, + {BUF_COMV, iris_vpu3x_4x_dec_comv_size }, + {BUF_NON_COMV, iris_vpu_dec_non_comv_size }, + {BUF_LINE, iris_vpu4x_dec_line_size }, + {BUF_PERSIST, iris_vpu5x_dec_persist_size }, + {BUF_DPB, iris_vpu_dec_dpb_size }, + {BUF_SCRATCH_1, iris_vpu_dec_scratch1_size }, + {BUF_PARTIAL, iris_vpu_dec_partial_size }, + }; + + static const struct iris_vpu_buf_type_handle enc_internal_buf_type_handle[] = { + {BUF_BIN, iris_vpu_enc_bin_size }, + {BUF_COMV, iris_vpu_enc_comv_size }, + {BUF_NON_COMV, iris_vpu_enc_non_comv_size }, + {BUF_LINE, iris_vpu4x_enc_line_size }, + {BUF_ARP, iris_vpu_enc_arp_size }, + {BUF_VPSS, iris_vpu_enc_vpss_size }, + {BUF_SCRATCH_1, iris_vpu_enc_scratch1_size }, + {BUF_SCRATCH_2, iris_vpu_enc_scratch2_size }, + }; + + if (inst->domain == DECODER) { + buf_type_handle_size = ARRAY_SIZE(dec_internal_buf_type_handle); + buf_type_handle_arr = dec_internal_buf_type_handle; + } else if (inst->domain == ENCODER) { + buf_type_handle_size = ARRAY_SIZE(enc_internal_buf_type_handle); + buf_type_handle_arr = enc_internal_buf_type_handle; + } + + for (i = 0; i < buf_type_handle_size; i++) { + if (buf_type_handle_arr[i].type == buffer_type) { + size = buf_type_handle_arr[i].handle(inst); + break; + } + } + + return size; +} + static u32 internal_buffer_count(struct iris_inst *inst, enum iris_buffer_type buffer_type) { diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.h b/drivers/media/platform/qcom/iris/iris_vpu_buffer.h index c7020931a642f0484b6f84af7ab51242e1845458..46210a2ec4942642ef61fc09cb0cc414f109607f 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.h +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.h @@ -64,6 +64,7 @@ struct iris_inst; #define VP9_UDC_HEADER_BUF_SIZE (3 * 128) #define SIZE_SEI_USERDATA 4096 +#define SIZE_SEI_USERDATA_UNREGISTERED 256 #define SIZE_DOLBY_RPU_METADATA (41 * 1024) #define H264_CABAC_HDR_RATIO_HD_TOT 1 #define H264_CABAC_RES_RATIO_HD_TOT 3 @@ -121,7 +122,7 @@ struct iris_inst; #define SIZE_SLICE_CMD_BUFFER (ALIGN(20480, 256)) #define SIZE_SPS_PPS_SLICE_HDR (2048 + 4096) #define SIZE_BSE_SLICE_CMD_BUF ((((8192 << 2) + 7) & (~7)) * 3) -#define SIZE_LAMBDA_LUT (256 * 11) +#define SIZE_LAMBDA_LUT (256 * 13) #define HFI_COL_FMT_NV12C_Y_TILE_HEIGHT (8) #define HFI_COL_FMT_NV12C_Y_TILE_WIDTH (32) @@ -289,6 +290,7 @@ static inline u32 size_av1d_qp(u32 frame_width, u32 frame_height) u32 iris_vpu_buf_size(struct iris_inst *inst, enum iris_buffer_type buffer_type); u32 iris_vpu33_buf_size(struct iris_inst *inst, enum iris_buffer_type buffer_type); u32 iris_vpu4x_buf_size(struct iris_inst *inst, enum iris_buffer_type buffer_type); +u32 iris_vpu5x_buf_size(struct iris_inst *inst, enum iris_buffer_type buffer_type); int iris_vpu_buf_count(struct iris_inst *inst, enum iris_buffer_type buffer_type); #endif -- 2.43.0