From: Wangao Wang <wangao.wang@oss.qualcomm.com>
To: Vikash Garodia <vikash.garodia@oss.qualcomm.com>,
Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>,
Bryan O'Donoghue <bod@kernel.org>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Stanimir Varbanov <stanimir.k.varbanov@gmail.com>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Wangao Wang <wangao.wang@oss.qualcomm.com>
Subject: [PATCH v2 5/7] media: iris: add hawi platform data
Date: Wed, 23 Sep 2026 11:27:55 +0800 [thread overview]
Message-ID: <20260923-add_iris_for_hawi-v2-5-016ec3d24b79@oss.qualcomm.com> (raw)
In-Reply-To: <20260923-add_iris_for_hawi-v2-0-016ec3d24b79@oss.qualcomm.com>
The Iris block in the Hawi SoC is a VPU5 capable of decoding H.264,
H.265, VP9 and AV1, and encoding H.264 and H.265. Add the platform
data entry describing the Hawi-specific clock tree, power domains,
firmware image, bandwidth table, DMA address range, and secure memory
regions so the Iris driver can match the qcom,hawi-iris compatible and
initialize the hardware.
Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>
---
drivers/media/platform/qcom/iris/Makefile | 1 +
.../platform/qcom/iris/iris_platform_common.h | 1 +
.../media/platform/qcom/iris/iris_platform_hawi.h | 48 ++++++++++++
.../media/platform/qcom/iris/iris_platform_vpu5.c | 86 ++++++++++++++++++++++
drivers/media/platform/qcom/iris/iris_probe.c | 4 +
5 files changed, 140 insertions(+)
diff --git a/drivers/media/platform/qcom/iris/Makefile b/drivers/media/platform/qcom/iris/Makefile
index adaf2f4ab08984bcf10b8ca7ed424a21635eafbe..b3b5c41c0aaf759d6bf82bef4ec78ae63769b561 100644
--- a/drivers/media/platform/qcom/iris/Makefile
+++ b/drivers/media/platform/qcom/iris/Makefile
@@ -15,6 +15,7 @@ qcom-iris-objs += iris_buffer.o \
iris_platform_vpu2.o \
iris_platform_vpu3x.o \
iris_platform_vpu4x.o \
+ iris_platform_vpu5.o \
iris_power.o \
iris_probe.o \
iris_resources.o \
diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h
index 4529f52a30d7f2ef82ec846bced6f9b5aef16558..ce01f7bf4ea9a4ba667d5dd4d04ac013a427c6c2 100644
--- a/drivers/media/platform/qcom/iris/iris_platform_common.h
+++ b/drivers/media/platform/qcom/iris/iris_platform_common.h
@@ -57,6 +57,7 @@ extern const struct iris_firmware_data iris_hfi_gen1_data;
extern const struct iris_firmware_data iris_hfi_gen2_data;
extern const struct iris_firmware_data iris_hfi_milos_data;
+extern const struct iris_platform_data hawi_data;
extern const struct iris_platform_data maili_data;
extern const struct iris_platform_data milos_data;
extern const struct iris_platform_data qcs8300_data;
diff --git a/drivers/media/platform/qcom/iris/iris_platform_hawi.h b/drivers/media/platform/qcom/iris/iris_platform_hawi.h
new file mode 100644
index 0000000000000000000000000000000000000000..90d9282ce59821489c941d7282b3f23e8c06622e
--- /dev/null
+++ b/drivers/media/platform/qcom/iris/iris_platform_hawi.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef __MEDIA_IRIS_PLATFORM_HAWI_H__
+#define __MEDIA_IRIS_PLATFORM_HAWI_H__
+
+static const char * const hawi_clk_reset_table[] = {
+ "bus0",
+ "core",
+};
+
+static const struct platform_clk_data hawi_clk_table[] = {
+ {IRIS_AXI_CLK, "iface" },
+ {IRIS_AXIC_CLK, "ifacec" },
+ {IRIS_CTRL_CLK, "core" },
+ {IRIS_HW_FREERUN_CLK, "core_freerun" },
+ {IRIS_CTRL_FREERUN_CLK, "core_ctl_freerun" },
+ {IRIS_CTRL_DEBUG_CLK, "core_debug" },
+ {IRIS_CX_AXI_CLK, "cx_iface" },
+ {IRIS_HW_CLK, "vcodec0_core" },
+ {IRIS_VPP0_HW_CLK, "vcodec_vpp0" },
+ {IRIS_VPP1_HW_CLK, "vcodec_vpp1" },
+ {IRIS_VPP_GATING_CLK, "vcodec_vpp0_vpp1_gating" },
+ {IRIS_APV_HW_CLK, "vcodec_apv" },
+ {IRIS_BSE_HW_CLK, "vcodec_bse" },
+};
+
+static const char *const hawi_opp_clk_table[] = {
+ "vcodec0_core",
+ "vcodec_apv",
+ "vcodec_bse",
+ "core",
+ NULL,
+};
+
+static const char * const hawi_pmdomain_table[] = {
+ "venus",
+ "vcodec0",
+ "vpp0",
+ "vpp1",
+ "apv",
+ "mm-int",
+ "cx-int",
+};
+
+#endif
diff --git a/drivers/media/platform/qcom/iris/iris_platform_vpu5.c b/drivers/media/platform/qcom/iris/iris_platform_vpu5.c
new file mode 100644
index 0000000000000000000000000000000000000000..0240b4dad6ad483feaad480a35c365c7a211ac42
--- /dev/null
+++ b/drivers/media/platform/qcom/iris/iris_platform_vpu5.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include "iris_core.h"
+#include "iris_ctrls.h"
+#include "iris_hfi_gen2.h"
+#include "iris_hfi_gen2_defines.h"
+#include "iris_platform_common.h"
+#include "iris_vpu_buffer.h"
+#include "iris_vpu_common.h"
+
+#include "iris_platform_sm8550.h"
+#include "iris_platform_hawi.h"
+
+static const struct iris_firmware_desc iris_vpu50_p2_s8_gen2_desc = {
+ .firmware_data = &iris_hfi_gen2_data,
+ .get_vpu_buffer_size = iris_vpu5x_buf_size,
+ .fwname = "qcom/vpu/vpu50_p2_s8.mbn",
+};
+
+static const u32 iris_fmts_vpu5_dec[] = {
+ [IRIS_FMT_H264] = V4L2_PIX_FMT_H264,
+ [IRIS_FMT_HEVC] = V4L2_PIX_FMT_HEVC,
+ [IRIS_FMT_VP9] = V4L2_PIX_FMT_VP9,
+ [IRIS_FMT_AV1] = V4L2_PIX_FMT_AV1,
+};
+
+static const struct icc_info iris_icc_info_vpu5[] = {
+ { "cpu-cfg", 1000, 1000 },
+ { "video-mem", 1000, 15000000 },
+};
+
+static const struct bw_info iris_bw_table_dec_vpu5[] = {
+ { ((4096 * 2160) / 256) * 60, 1608000 },
+ { ((4096 * 2160) / 256) * 30, 826000 },
+ { ((1920 * 1080) / 256) * 60, 567000 },
+ { ((1920 * 1080) / 256) * 30, 294000 },
+};
+
+static const char * const iris_opp_pd_table_vpu5[] = { "mxc", "mmcx" };
+
+static const struct tz_cp_config tz_cp_config_vpu5[] = {
+ {
+ .cp_start = VIDEO_REGION_VM0_SECURE_NP_ID,
+ .cp_size = 0,
+ .cp_nonpixel_start = 0x0d000000,
+ .cp_nonpixel_size = 0x25000000,
+ },
+ {
+ .cp_start = VIDEO_REGION_VM0_NONSECURE_NP_ID,
+ .cp_size = 0,
+ .cp_nonpixel_start = 0x32000000,
+ .cp_nonpixel_size = 0xcdc00000,
+ },
+};
+
+const struct iris_platform_data hawi_data = {
+ .firmware_desc_gen2 = &iris_vpu50_p2_s8_gen2_desc,
+ .vpu_ops = &iris_vpu5x_ops,
+ .icc_tbl = iris_icc_info_vpu5,
+ .icc_tbl_size = ARRAY_SIZE(iris_icc_info_vpu5),
+ .clk_rst_tbl = hawi_clk_reset_table,
+ .clk_rst_tbl_size = ARRAY_SIZE(hawi_clk_reset_table),
+ .bw_tbl_dec = iris_bw_table_dec_vpu5,
+ .bw_tbl_dec_size = ARRAY_SIZE(iris_bw_table_dec_vpu5),
+ .pmdomain_tbl = hawi_pmdomain_table,
+ .pmdomain_tbl_size = ARRAY_SIZE(hawi_pmdomain_table),
+ .opp_pd_tbl = iris_opp_pd_table_vpu5,
+ .opp_pd_tbl_size = ARRAY_SIZE(iris_opp_pd_table_vpu5),
+ .clk_tbl = hawi_clk_table,
+ .clk_tbl_size = ARRAY_SIZE(hawi_clk_table),
+ .opp_clk_tbl = hawi_opp_clk_table,
+ /* Upper bound of DMA address range */
+ .dma_mask = 0xffc00000 - 1,
+ .inst_iris_fmts = iris_fmts_vpu5_dec,
+ .inst_iris_fmts_size = ARRAY_SIZE(iris_fmts_vpu5_dec),
+ .inst_caps = &platform_inst_cap_sm8550,
+ .tz_cp_config_data = tz_cp_config_vpu5,
+ .tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_vpu5),
+ .num_vpp_pipe = 2,
+ .max_session_count = 16,
+ .max_core_mbpf = NUM_MBS_8K * 2,
+ .max_core_mbps = NUM_MBS_8K * 60,
+};
diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/platform/qcom/iris/iris_probe.c
index be8a102e239c34620d540c54f1f034a9236da7a7..8bfef0df073765d603ada4b06b07162b76067ed7 100644
--- a/drivers/media/platform/qcom/iris/iris_probe.c
+++ b/drivers/media/platform/qcom/iris/iris_probe.c
@@ -427,6 +427,10 @@ static const struct dev_pm_ops iris_pm_ops = {
};
static const struct of_device_id iris_dt_match[] = {
+ {
+ .compatible = "qcom,hawi-iris",
+ .data = &hawi_data,
+ },
{
.compatible = "qcom,maili-iris",
.data = &maili_data,
--
2.43.0
next prev parent reply other threads:[~2026-09-23 3:28 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-23 3:27 [PATCH v2 0/7] media: iris: add support for hawi platform Wangao Wang
2026-09-23 3:27 ` [PATCH v2 1/7] dt-bindings: media: qcom,hawi-iris: Add Hawi video codec Wangao Wang
2026-09-23 12:12 ` Rob Herring (Arm)
2026-09-23 3:27 ` [PATCH v2 2/7] media: iris: move shared APV PM helpers to iris_vpu_common Wangao Wang
2026-10-02 15:45 ` Dmitry Baryshkov
2026-09-23 3:27 ` [PATCH v2 3/7] media: iris: add VPU5x hardware ops Wangao Wang
2026-10-02 15:46 ` Dmitry Baryshkov
2026-09-23 3:27 ` [PATCH v2 4/7] media: iris: add VPU5x internal buffer size calculations Wangao Wang
2026-09-23 3:27 ` Wangao Wang [this message]
2026-09-23 3:27 ` [PATCH v2 6/7] arm64: dts: qcom: hawi: add iris video codec node Wangao Wang
2026-09-30 11:17 ` Konrad Dybcio
2026-10-02 9:19 ` Abel Vesa
2026-09-23 3:27 ` [PATCH v2 7/7] arm64: dts: qcom: hawi: enable iris on mtp board Wangao Wang
2026-09-30 11:17 ` Konrad Dybcio
2026-10-02 16:03 ` Dmitry Baryshkov
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