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From: sashiko-bot@kernel.org
To: "Inochi Amaoto" <inochiama@gmail.com>
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v6 6/6] PCI: spacemit-k1: Add Spacemit K3 PCIe host controller support
Date: Wed, 23 Sep 2026 02:01:40 +0000	[thread overview]
Message-ID: <20260923020141.21F0C1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260923015016.64069-7-inochiama@gmail.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] pci: mmio access before clocks and resets are enabled causes crash
--

commit f8b3a671e2cd8186deb7de2df88df163e1636aa6
Author: Inochi Amaoto <inochiama@gmail.com>

PCI: spacemit-k1: Add Spacemit K3 PCIe host controller support

This commit adds driver support for the PCIe controller on the Spacemit
K3 SoC. It introduces a new device data structure and initialization
callbacks specific to K3 hardware.

> diff --git a/drivers/pci/controller/dwc/pcie-spacemit-k1.c b/drivers/pci/controller/dwc/pcie-spacemit-k1.c
> index ec59ccb710ec1..c3b935f424cd7 100644
> --- a/drivers/pci/controller/dwc/pcie-spacemit-k1.c
> +++ b/drivers/pci/controller/dwc/pcie-spacemit-k1.c

[ ... ]

> +static int k3_pcie_parse_port(struct k1_pcie *k1)
> +{
> +	u32 status0, status1, status2;
> +
> +	/* Clear the status registers */
> +	status0 = readl_relaxed(k1->link + K3_PHY_AHB_IRQSTATUS_INTX);
> +	status1 = readl_relaxed(k1->link + INTR_STATUS);
> +	status2 = readl_relaxed(k1->link + K3_ADDR_INTR_STATUS1);

[Severity: High]
Does this trigger a synchronous external abort or SError during probe?

Looking at k1_pcie_probe(), the driver calls data->parse_port() before
dw_pcie_host_init():

k1_pcie_probe()
  data->parse_port() -> k3_pcie_parse_port()
  ...
  dw_pcie_host_init()
    host_ops->init() -> k3_pcie_init()
      k1_pcie_enable_resources()

The clocks and resets are enabled later in k1_pcie_enable_resources().
Will these early MMIO accesses in k3_pcie_parse_port() crash the kernel
if the bootloader didn't leave the controller clocked and out of reset?

> +
> +	writel_relaxed(status0, k1->link + K3_PHY_AHB_IRQSTATUS_INTX);
> +	writel_relaxed(status1, k1->link + INTR_STATUS);
> +	writel_relaxed(status2, k1->link + K3_ADDR_INTR_STATUS1);
> +
> +	return k1_pcie_parse_port(k1);
> +}

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260923015016.64069-1-inochiama@gmail.com?part=6

  reply	other threads:[~2026-09-23  2:01 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-23  1:50 [PATCH v6 0/6] riscv: spacemit: Add PCIe RC controller support for K3 Inochi Amaoto
2026-09-23  1:50 ` [PATCH v6 1/6] PCI: spacemit-k1: Add device data support Inochi Amaoto
2026-09-23  1:53   ` sashiko-bot
2026-09-23  1:50 ` [PATCH v6 2/6] PCI: spacemit-k1: Add multiple PHY handles support Inochi Amaoto
2026-09-23  2:00   ` sashiko-bot
2026-09-23  1:50 ` [PATCH v6 3/6] PCI: spacemit-k1: Add device id update helper Inochi Amaoto
2026-09-23  1:53   ` sashiko-bot
2026-09-23  1:50 ` [PATCH v6 4/6] dt-bindings: PCI: snps,dw-pcie: Add msi-parent for MSI handle check Inochi Amaoto
2026-09-23  1:55   ` sashiko-bot
2026-09-23  1:50 ` [PATCH v6 5/6] dt-bindings: PCI: spacemit: Introduce Spacemit K3 PCIe host controller Inochi Amaoto
2026-09-23  1:55   ` sashiko-bot
2026-09-23  1:50 ` [PATCH v6 6/6] PCI: spacemit-k1: Add Spacemit K3 PCIe host controller support Inochi Amaoto
2026-09-23  2:01   ` sashiko-bot [this message]
2026-09-24  3:25   ` Troy Mitchell

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