From: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
To: Srinivas Kandagatla <srini@kernel.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>
Cc: Abel Vesa <abelvesa@kernel.org>,
linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
Subject: [PATCH v1 4/8] arm64: dts: qcom: hawi: add LPASS audio subsystem nodes
Date: Wed, 23 Sep 2026 14:16:23 +0530 [thread overview]
Message-ID: <20260923084627.748920-5-prasad.kumpatla@oss.qualcomm.com> (raw)
In-Reply-To: <20260923084627.748920-1-prasad.kumpatla@oss.qualcomm.com>
Add the Low Power Audio SubSystem (LPASS) device tree infrastructure
for Hawi to describe the ADSP-based audio pipeline.
Add the GPR (Generic Packet Router) node with q6apm and q6prm audio
services, LPASS RX, TX and VA macro codecs, SoundWire controllers,
VA CSR clock provider, and LPI TLMM pinctrl node required by the audio
subsystem.
Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/hawi.dtsi | 291 +++++++++++++++++++++++++++++
1 file changed, 291 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/hawi.dtsi b/arch/arm64/boot/dts/qcom/hawi.dtsi
index c7ae8133b9cd..a0807cd66a00 100644
--- a/arch/arm64/boot/dts/qcom/hawi.dtsi
+++ b/arch/arm64/boot/dts/qcom/hawi.dtsi
@@ -22,6 +22,8 @@
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include "hawi-ipcc.h"
+#include <dt-bindings/soc/qcom,gpr.h>
+#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
/ {
interrupt-parent = <&intc>;
@@ -3841,6 +3843,295 @@ compute-cb@8 {
dma-coherent;
};
};
+
+ gpr {
+ compatible = "qcom,gpr";
+ qcom,glink-channels = "adsp_apps";
+ qcom,domain = <GPR_DOMAIN_ID_ADSP>;
+ qcom,intents = <512 20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ q6apm: service@1 {
+ compatible = "qcom,q6apm";
+ reg = <GPR_APM_MODULE_IID>;
+ #sound-dai-cells = <0>;
+ qcom,protection-domain = "avs/audio",
+ "msm/adsp/audio_pd";
+
+ q6apmbedai: bedais {
+ compatible = "qcom,q6apm-lpass-dais";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+ };
+
+ q6apmdai: dais {
+ compatible = "qcom,q6apm-dais";
+ iommus = <&apps_smmu 0x0c01 0x80>,
+ <&apps_smmu 0x0c41 0x20>;
+ };
+ };
+
+ q6prm: service@2 {
+ compatible = "qcom,q6prm";
+ reg = <GPR_PRM_MODULE_IID>;
+ qcom,protection-domain = "avs/audio",
+ "msm/adsp/audio_pd";
+
+ q6prmcc: clock-controller {
+ compatible = "qcom,q6prm-lpass-clocks";
+ #clock-cells = <2>;
+ };
+ };
+ };
+ };
+ };
+
+ lpass_rxmacro: codec@72c0000 {
+ compatible = "qcom,hawi-lpass-rx-macro";
+ reg = <0x0 0x072c0000 0x0 0x1000>;
+ clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_LPR_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&lpass_vamacro>;
+ clock-names = "mclk", "lpr", "dcodec", "fsgen";
+
+ #clock-cells = <0>;
+ clock-output-names = "mclk";
+ #sound-dai-cells = <1>;
+ };
+
+ swr1: soundwire@72d0000 {
+ compatible = "qcom,soundwire-v3.1.0";
+ reg = <0x0 0x072d0000 0x0 0x10000>;
+ interrupts = <GIC_ESPI 219 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&lpass_rxmacro>;
+ clock-names = "iface";
+ label = "RX";
+
+ pinctrl-0 = <&rx_swr_active>;
+ pinctrl-names = "default";
+
+ qcom,din-ports = <1>;
+ qcom,dout-ports = <11>;
+ qcom,ports-sinterval = /bits/ 16 <0x03 0x3f 0x1f 0x07 0x00 0x18f 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x00 0x00 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00 0x00 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff 0x0f 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff 0x00 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00 0x00 0xff 0xff 0xff 0xff 0xff 0xff>;
+ qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00 0x00 0xff 0xff 0xff 0xff 0xff 0xff>;
+
+ #address-cells = <2>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+
+ status = "disabled";
+ };
+
+ lpass_txmacro: codec@72e0000 {
+ compatible = "qcom,hawi-lpass-tx-macro";
+ reg = <0x0 0x72e0000 0x0 0x1000>;
+ clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_LPR_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&lpass_vamacro>;
+ clock-names = "mclk", "lpr", "dcodec", "fsgen";
+
+ #clock-cells = <0>;
+ clock-output-names = "mclk";
+ #sound-dai-cells = <1>;
+ };
+
+ swr2: soundwire@7e90000 {
+ compatible = "qcom,soundwire-v3.1.0";
+ reg = <0x0 0x7e90000 0x0 0x10000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "core", "wakeup";
+ clocks = <&lpass_txmacro>;
+ clock-names = "iface";
+ label = "TX";
+
+ pinctrl-0 = <&tx_swr_active>;
+ pinctrl-names = "default";
+
+ qcom,din-ports = <4>;
+ qcom,dout-ports = <0>;
+ qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>;
+ qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x00 0x01>;
+ qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00 0x00>;
+ qcom,ports-hstart = /bits/ 8 <0xff 0xff 0x00 0xff>;
+ qcom,ports-hstop = /bits/ 8 <0xff 0xff 0x0f 0xff>;
+ qcom,ports-word-length = /bits/ 8 <0xff 0x00 0x00 0xff>;
+ qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0x00 0xff>;
+ qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0x00 0xff>;
+ qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x01 0x00>;
+
+ #address-cells = <2>;
+ #size-cells = <0>;
+ #sound-dai-cells = <1>;
+
+ status = "disabled";
+ };
+
+ lpass_vamacro: codec@7ec0000 {
+ compatible = "qcom,hawi-lpass-va-macro";
+ reg = <0x0 0x07ec0000 0x0 0x2000>;
+ clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_LPR_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&lpass_va_csr>;
+ clock-names = "mclk", "lpr", "dcodec", "heartbeatpulse";
+
+ #clock-cells = <0>;
+ clock-output-names = "fsgen";
+ #sound-dai-cells = <1>;
+ };
+
+ lpass_va_csr: va-csr@7ee0000 {
+ compatible = "qcom,hawi-lpass-va-csr";
+ reg = <0x0 0x07ee0000 0x0 0xe000>;
+ clocks = <&q6prmcc LPASS_HW_LPR_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "lpr", "audio";
+ #clock-cells = <0>;
+ };
+
+ lpass_tlmm: pinctrl@7f60000 {
+ compatible = "qcom,hawi-lpass-lpi-pinctrl";
+ reg = <0x0 0x07f60000 0x0 0x20000>;
+
+ clocks = <&q6prmcc LPASS_HW_LPR_VOTE
+ LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "lpr", "audio";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&lpass_tlmm 0 0 23>;
+
+ dmic01_default: dmic01-default-state {
+ clk-pins {
+ pins = "gpio6";
+ function = "dmic1_clk";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ data-pins {
+ pins = "gpio7";
+ function = "dmic1_data";
+ drive-strength = <8>;
+ input-enable;
+ };
+ };
+
+ dmic23_default: dmic23-default-state {
+ clk-pins {
+ pins = "gpio8";
+ function = "dmic2_clk";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ data-pins {
+ pins = "gpio9";
+ function = "dmic2_data";
+ drive-strength = <8>;
+ input-enable;
+ };
+ };
+
+ lpi_i2s1_active: lpi-i2s1-active-state {
+ clk-pins {
+ pins = "gpio10";
+ function = "i2s1_clk";
+ drive-strength = <8>;
+ bias-disable;
+ output-high;
+ };
+
+ ws-pins {
+ pins = "gpio11";
+ function = "i2s1_ws";
+ drive-strength = <8>;
+ bias-disable;
+ output-high;
+ };
+
+ data-pins {
+ pins = "gpio15", "gpio16";
+ function = "i2s1_data";
+ drive-strength = <8>;
+ bias-disable;
+ output-high;
+ };
+ };
+
+ lpi_i2s1_sleep: lpi-i2s1-sleep-state {
+ clk-pins {
+ pins = "gpio10";
+ function = "i2s1_clk";
+ drive-strength = <2>;
+ bias-pull-down;
+ input-enable;
+ };
+
+ ws-pins {
+ pins = "gpio11";
+ function = "i2s1_ws";
+ drive-strength = <2>;
+ bias-pull-down;
+ input-enable;
+ };
+
+ data-pins {
+ pins = "gpio15", "gpio16";
+ function = "i2s1_data";
+ drive-strength = <2>;
+ bias-pull-down;
+ input-enable;
+ };
+ };
+
+ rx_swr_active: rx-swr-active-state {
+ clk-pins {
+ pins = "gpio3";
+ function = "swr_rx_clk";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ data-pins {
+ pins = "gpio4", "gpio5";
+ function = "swr_rx_data";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-bus-hold;
+ };
+ };
+
+ tx_swr_active: tx-swr-active-state {
+ clk-pins {
+ pins = "gpio0";
+ function = "swr_tx_clk";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ data-pins {
+ pins = "gpio1", "gpio2", "gpio14";
+ function = "swr_tx_data";
+ drive-strength = <2>;
+ slew-rate = <1>;
+ bias-bus-hold;
+ };
};
};
--
2.34.1
next prev parent reply other threads:[~2026-09-23 8:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-23 8:46 [PATCH v1 0/8] ASoC: qcom: Add audio support for Hawi and Maili platforms Prasad Kumpatla
2026-09-23 8:46 ` [PATCH v1 1/8] ASoC: codecs: wsa885x: Reset registers on teardown for B2B playback Prasad Kumpatla
2026-09-23 8:46 ` [PATCH v1 2/8] ASoC: qcom: sc8280xp: add Maili sound card configuration Prasad Kumpatla
2026-09-23 8:46 ` [PATCH v1 3/8] ASoC: dt-bindings: qcom: Add Maili LPASS macro codecs Prasad Kumpatla
2026-09-23 8:51 ` Krzysztof Kozlowski
2026-09-23 8:46 ` Prasad Kumpatla [this message]
2026-09-23 8:46 ` [PATCH v1 5/8] arm64: dts: qcom: hawi-mtp: enable audio playback and capture Prasad Kumpatla
2026-09-24 4:57 ` Ajay Kumar Nandam
2026-09-23 8:46 ` [PATCH v1 6/8] arm64: dts: qcom: maili: add LPASS audio subsystem nodes Prasad Kumpatla
2026-09-23 8:46 ` [PATCH v1 7/8] arm64: dts: qcom: maili-mtp: enable audio playback and capture Prasad Kumpatla
2026-09-24 5:21 ` Ajay Kumar Nandam
2026-09-23 8:46 ` [PATCH v1 8/8] arm64: defconfig: Enable Hawi LPASS LPI pinctrl driver Prasad Kumpatla
2026-09-23 15:32 ` [PATCH v1 0/8] ASoC: qcom: Add audio support for Hawi and Maili platforms Mark Brown
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