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Add an overlay supporting two such boards, each connected to one of the two CSI RX inputs on AM68-SK. The same overlay can be reused on AM69-SK and J721E-SK. [1] https://www.arducam.com/downloads/datasheet/Arducam_V3Link_Datasheet.pdf Reviewed-by: Rishikesh Donadkar Signed-off-by: Vaishnav Achath Signed-off-by: Yemike Abhilash Chandra --- Changes in v3: - Rename fixed-clock node to the generic clock- form (Krzysztof) - Also rename fixed-clock label to lowercase - Override CSI2RX ports using &csiN_port0 labels instead of the full &cdns_csi2rxN node path, and drop duplicated properties (Krzysztof) - Fix minor DTS coding style issues (Sashiko) - Use GPL-2.0-only OR MIT license for consistency - Update copyright year to 2026 (Udit) arch/arm64/boot/dts/ti/Makefile | 10 + .../boot/dts/ti/k3-am68-sk-v3link-fusion.dtso | 184 ++++++++++++++++++ 2 files changed, 194 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am68-sk-v3link-fusion.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 0fff4c815597..3d503811168b 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -194,6 +194,7 @@ k3-am68-phyboard-izar-pwm-fan-dtbs := k3-am68-phyboard-izar.dtb \ k3-am68-phyboard-izar-pwm-fan.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board.dtb dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board-pcie1-ep.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-v3link-fusion.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-fusion.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-gesi-exp-board.dtbo @@ -377,6 +378,8 @@ k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \ k3-am68-sk-base-board-pcie1-ep.dtbo k3-am68-sk-fpdlink-fusion-dtbs := k3-am68-sk-base-board.dtb \ k3-j721e-sk-fpdlink-fusion.dtbo +k3-am68-sk-v3link-fusion-dtbs := k3-am68-sk-base-board.dtb \ + k3-am68-sk-v3link-fusion.dtbo k3-am69-aquila-clover-panel-cap-touch-7inch-dsi-dtbs := \ k3-am69-aquila-clover.dtb \ k3-am69-aquila-panel-cap-touch-7inch-dsi.dtbo @@ -406,6 +409,8 @@ k3-am69-sk-fpdlink-fusion-dtbs := k3-am69-sk.dtb \ k3-j721e-sk-fpdlink-fusion.dtbo k3-am69-sk-pcie0-ep-dtbs := k3-am69-sk.dtb \ k3-am69-sk-pcie0-ep.dtbo +k3-am69-sk-v3link-fusion-dtbs := k3-am69-sk.dtb \ + k3-am68-sk-v3link-fusion.dtbo k3-j7200-evm-pcie1-ep-dtbs := k3-j7200-common-proc-board.dtb \ k3-j7200-evm-pcie1-ep.dtbo k3-j721e-common-proc-board-infotainment-dtbs := k3-j721e-common-proc-board.dtb \ @@ -420,6 +425,8 @@ k3-j721e-sk-csi2-dual-imx219-dtbs := k3-j721e-sk.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo k3-j721e-sk-fpdlink-fusion-dtbs := k3-j721e-sk.dtb \ k3-j721e-sk-fpdlink-fusion.dtbo +k3-j721e-sk-v3link-fusion-dtbs := k3-j721e-sk.dtb \ + k3-am68-sk-v3link-fusion.dtbo k3-j721s2-evm-fpdlink-fusion-dtbs := k3-j721s2-common-proc-board.dtb \ k3-j721s2-evm-fusion.dtbo k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ @@ -511,6 +518,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am68-sk-base-board-csi2-dual-imx219.dtb \ k3-am68-sk-base-board-pcie1-ep.dtb \ k3-am68-sk-fpdlink-fusion.dtb \ + k3-am68-sk-v3link-fusion.dtb \ k3-am69-aquila-clover-panel-cap-touch-7inch-dsi.dtb \ k3-am69-aquila-dev-adapter-panel-cap-touch-10inch-dsi.dtb \ k3-am69-aquila-dev-adapter-panel-cap-touch-7inch-dsi.dtb \ @@ -521,6 +529,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am69-sk-csi2-dual-imx219.dtb \ k3-am69-sk-fpdlink-fusion.dtb \ k3-am69-sk-pcie0-ep.dtb \ + k3-am69-sk-v3link-fusion.dtb \ k3-j7200-evm-pcie1-ep.dtb \ k3-j721e-common-proc-board-infotainment.dtb \ k3-j721e-evm-fpdlink-fusion.dtb \ @@ -528,6 +537,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-j721e-evm-pcie1-ep.dtb \ k3-j721e-sk-csi2-dual-imx219.dtb \ k3-j721e-sk-fpdlink-fusion.dtb \ + k3-j721e-sk-v3link-fusion.dtb \ k3-j721s2-evm-fpdlink-fusion.dtb \ k3-j721s2-evm-pcie1-ep.dtb \ k3-j721s2-evm-usb0-type-a.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-v3link-fusion.dtso b/arch/arm64/boot/dts/ti/k3-am68-sk-v3link-fusion.dtso new file mode 100644 index 000000000000..667c7e1edae7 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-v3link-fusion.dtso @@ -0,0 +1,184 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * DT Overlay for Arducam V3Link UC-A09 board + * https://www.arducam.com/fpd-link-3-cameras/ + * + * Copyright (C) 2026 Texas Instruments Incorporated - http://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +&{/} { + clk_fusion_25mhz: clock-25000000 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; +}; + +&csi_mux { + idle-state = <1>; +}; + +&cam0_i2c { + #address-cells = <1>; + #size-cells = <0>; + + deser@30 { + compatible = "ti,ds90ub960-q1"; + reg = <0x30>; + + clock-names = "refclk"; + clocks = <&clk_fusion_25mhz>; + + i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>; + + deserializer_0_ports: ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + status = "disabled"; + }; + + port@1 { + reg = <1>; + status = "disabled"; + }; + + port@2 { + reg = <2>; + status = "disabled"; + }; + + port@3 { + reg = <3>; + status = "disabled"; + }; + + /* CSI-2 TX */ + port@4 { + reg = <4>; + ds90ub960_0_csi_out: endpoint { + data-lanes = <1 2 3 4>; + clock-lanes = <0>; + link-frequencies = /bits/ 64 <800000000>; + remote-endpoint = <&csi2_phy0>; + }; + }; + + port@5 { + reg = <5>; + status = "disabled"; + }; + }; + + deserializer_0_links: links { + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&cam1_i2c { + #address-cells = <1>; + #size-cells = <0>; + + deser@30 { + compatible = "ti,ds90ub960-q1"; + reg = <0x30>; + + clock-names = "refclk"; + clocks = <&clk_fusion_25mhz>; + + i2c-alias-pool = <0x5a 0x5b 0x5c 0x5d 0x5e 0x5f>; + + deserializer_1_ports: ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + status = "disabled"; + }; + + port@1 { + reg = <1>; + status = "disabled"; + }; + + port@2 { + reg = <2>; + status = "disabled"; + }; + + port@3 { + reg = <3>; + status = "disabled"; + }; + + /* CSI-2 TX */ + port@4 { + reg = <4>; + ds90ub960_1_csi_out: endpoint { + data-lanes = <1 2 3 4>; + clock-lanes = <0>; + link-frequencies = /bits/ 64 <800000000>; + remote-endpoint = <&csi2_phy1>; + }; + }; + + port@5 { + reg = <5>; + status = "disabled"; + }; + }; + + deserializer_1_links: links { + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&csi0_port0 { + status = "okay"; + + csi2_phy0: endpoint { + remote-endpoint = <&ds90ub960_0_csi_out>; + bus-type = <4>; /* CSI2 DPHY */ + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + link-frequencies = /bits/ 64 <800000000>; + }; +}; + +&csi1_port0 { + status = "okay"; + + csi2_phy1: endpoint { + remote-endpoint = <&ds90ub960_1_csi_out>; + bus-type = <4>; /* CSI2 DPHY */ + clock-lanes = <0>; + data-lanes = <1 2 3 4>; + link-frequencies = /bits/ 64 <800000000>; + }; +}; + +&ti_csi2rx0 { + status = "okay"; +}; + +&dphy0 { + status = "okay"; +}; + +&ti_csi2rx1 { + status = "okay"; +}; + +&dphy1 { + status = "okay"; +}; -- 2.34.1