Re: [PATCH v2 2/2] arm64: dts: allwinner: h616: orangepi-zero2w: add SDIO WiFi/BT (AW859A)

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] dt: mmc-pwrseq-simple silent clock failure due to incorrect clock-names
- [High] dt: missing pinctrl for RTC 32kHz clock output
- [Low] dt: use of magic number for RTC clock index
--

commit 97053bae21777f073acfc22535e6c83308625172
Author: Vladimir <anykey196@gmail.com>

arm64: dts: allwinner: h616: orangepi-zero2w: add SDIO WiFi/BT (AW859A)

Enable the SDIO bus (mmc1) and power the on-board AW859A (UWE5622)
WiFi/BT combo through an mmc-pwrseq-simple that resets WL_REG_ON (PG18), with
the 3.3 V and 1.8 V supplies and the RTC 32 kHz clock.

> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
> index ff9b40352a545..7d473274c06c0 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
> @@ -189,3 +189,43 @@ &usbphy {

[ ... ]

> +	wifi_pwrseq: wifi-pwrseq {
> +		compatible = "mmc-pwrseq-simple";

[Severity: High]
Does this node need pinctrl properties to physically route the 32kHz RTC fanout
clock to its output pin (PG10)?

During the probing of the wifi_pwrseq node at boot, without specifying
pinctrl-0 = <&x32clk_fanout_pin>; and pinctrl-names = "default";, the pin
remains in its default state. This physically disconnects the clock signal from
the external WiFi/BT chip.

> +		clocks = <&rtc 1>;

[Severity: Low]
Is it possible to use the CLK_OSC32K_FANOUT macro defined in
include/dt-bindings/clock/sun6i-rtc.h here instead of the magic number 1?

This would improve readability and consistency with other Allwinner device
trees.

> +		clock-names = "osc32k-out";

[Severity: High]
Does the mmc-pwrseq-simple driver expect the clock name to be exactly
"ext_clock"?

When probing the wifi_pwrseq node, because this patch uses "osc32k-out",
devm_clk_get(dev, "ext_clock") returns -ENOENT. The driver treats -ENOENT as an
optional clock being absent and silently continues without enabling the 32kHz
clock. This causes the WiFi/BT module to fail to initialize or operate reliably.

> +		reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>;	/* PG18 */
> +		post-power-on-delay-ms = <200>;
> +	};
> +};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260923110736.10-1-anykey196@gmail.com?part=2