From: sashiko-bot@kernel.org
To: "Shawn Guo" <shengchao.guo@oss.qualcomm.com>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: nord: Add bwmon node for Nord
Date: Thu, 24 Sep 2026 07:43:14 +0000 [thread overview]
Message-ID: <20260924074314.8677D1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260924073222.1000666-3-shengchao.guo@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt: qcom: nord: BWMON nodes lack compatible and are not disabled in base dtsi
--
commit 675cbf4793d6f43a6d3c3f98ae9f6537235567fc
Author: Pushpendra Singh <pussin@qti.qualcomm.com>
arm64: dts: qcom: nord: Add bwmon node for Nord
This commit adds BWMON nodes and associated OPP tables for dynamic DDR/LLCC
frequency scaling. The compatible strings and interconnect properties are
added in the nord-embedded.dtsi variant file.
> diff --git a/arch/arm64/boot/dts/qcom/nord.dtsi b/arch/arm64/boot/dts/qcom/nord.dtsi
> index e0496fd40c308..4c3504b2a233b 100644
> --- a/arch/arm64/boot/dts/qcom/nord.dtsi
> +++ b/arch/arm64/boot/dts/qcom/nord.dtsi
[ ... ]
> @@ -1460,6 +1460,73 @@ uart13: serial@a98000 {
> };
> };
>
> + bwmon_cluster2: pmu@1014400 {
> + reg = <0x0 0x01014400 0x0 0x500>;
> + interrupts = <GIC_SPI 739 IRQ_TYPE_LEVEL_HIGH>;
> + operating-points-v2 = <&bwmon_cluster_opp_table>;
> + };
> +
> + bwmon_cluster1: pmu@1015400 {
> + reg = <0x0 0x01015400 0x0 0x500>;
> + interrupts = <GIC_SPI 812 IRQ_TYPE_LEVEL_HIGH>;
> + operating-points-v2 = <&bwmon_cluster_opp_table>;
> + };
> +
> + bwmon_cluster0: pmu@1016400 {
> + reg = <0x0 0x01016400 0x0 0x500>;
> + interrupts = <GIC_SPI 813 IRQ_TYPE_LEVEL_HIGH>;
[Severity: Low]
Since bwmon_cluster0, bwmon_cluster1, and bwmon_cluster2 omit the
'compatible' string here to wait for variant-specific interconnects, should
they be marked with 'status = "disabled";' in this base dtsi?
If they remain enabled, won't they unconditionally instantiate as incomplete
dead nodes in the final DTB for any other board (such as nord-gearvm.dtsi)
that includes nord.dtsi without appending a compatible string?
Base SoC nodes awaiting variant properties typically need to be disabled by
default or located entirely within the variant include to satisfy DT schema
validation.
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260924073222.1000666-1-shengchao.guo@oss.qualcomm.com?part=2
prev parent reply other threads:[~2026-09-24 7:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-24 7:32 [PATCH v2 0/2] Add BWMON support for Nord SoC Shawn Guo
2026-09-24 7:32 ` [PATCH v2 1/2] dt-bindings: interconnect: qcom-bwmon: add nord cpu-bwmon compatible Shawn Guo
2026-09-24 12:25 ` Bartosz Golaszewski
2026-09-24 7:32 ` [PATCH v2 2/2] arm64: dts: qcom: nord: Add bwmon node for Nord Shawn Guo
2026-09-24 7:43 ` sashiko-bot [this message]
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