From: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Abel Vesa <abelvesa@kernel.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Subject: [PATCH 1/4] arm64: dts: qcom: hawi: Sort IPCC client IDs
Date: Fri, 25 Sep 2026 15:43:05 +0530 [thread overview]
Message-ID: <20260925101309.3826038-1-mukesh.ojha@oss.qualcomm.com> (raw)
The IPCC client ID macros within each group in hawi-ipcc.h are not
ordered by their numeric values, making it harder to cross-check
against hardware documentation and spot missing IDs at a glance.
Sort the defines in the IPCC_MPROC, IPCC_COMPUTE_L0, IPCC_COMPUTE_L1,
and IPCC_FENCE groups by ascending value.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/hawi-ipcc.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/hawi-ipcc.h b/arch/arm64/boot/dts/qcom/hawi-ipcc.h
index 67f228e1aa0e..7659357691c1 100644
--- a/arch/arm64/boot/dts/qcom/hawi-ipcc.h
+++ b/arch/arm64/boot/dts/qcom/hawi-ipcc.h
@@ -14,11 +14,11 @@
#define IPCC_MPROC_SDC 4
#define IPCC_MPROC_CDSP 5
#define IPCC_MPROC_APSS 6
-#define IPCC_MPROC_SPSS 15
-#define IPCC_MPROC_TME 16
#define IPCC_MPROC_SOCCP 12
#define IPCC_MPROC_DCP 13
#define IPCC_MPROC_QECP 14
+#define IPCC_MPROC_SPSS 15
+#define IPCC_MPROC_TME 16
#define IPCC_COMPUTE_L0_LPASS 1
#define IPCC_COMPUTE_L0_CDSP 2
@@ -26,10 +26,10 @@
#define IPCC_COMPUTE_L0_GPU 4
#define IPCC_COMPUTE_L0_CVP 8
#define IPCC_COMPUTE_L0_CAM 9
-#define IPCC_COMPUTE_L0_VPU 12
-#define IPCC_COMPUTE_L0_SOCCP 16
#define IPCC_COMPUTE_L0_CAM1 10
#define IPCC_COMPUTE_L0_DCP 11
+#define IPCC_COMPUTE_L0_VPU 12
+#define IPCC_COMPUTE_L0_SOCCP 16
#define IPCC_COMPUTE_L1_LPASS 1
#define IPCC_COMPUTE_L1_CDSP 2
@@ -37,10 +37,10 @@
#define IPCC_COMPUTE_L1_GPU 4
#define IPCC_COMPUTE_L1_CVP 8
#define IPCC_COMPUTE_L1_CAM 9
-#define IPCC_COMPUTE_L1_VPU 12
-#define IPCC_COMPUTE_L1_SOCCP 16
#define IPCC_COMPUTE_L1_CAM1 10
#define IPCC_COMPUTE_L1_DCP 11
+#define IPCC_COMPUTE_L1_VPU 12
+#define IPCC_COMPUTE_L1_SOCCP 16
#define IPCC_PERIPH_CDSP 2
#define IPCC_PERIPH_APSS 3
@@ -53,9 +53,9 @@
#define IPCC_FENCE_GPU 4
#define IPCC_FENCE_CVP 8
#define IPCC_FENCE_CAM 9
-#define IPCC_FENCE_VPU 20
-#define IPCC_FENCE_SOCCP 24
#define IPCC_FENCE_CAM1 10
#define IPCC_FENCE_DCP 11
+#define IPCC_FENCE_VPU 20
+#define IPCC_FENCE_SOCCP 24
#endif
--
2.55.0
next reply other threads:[~2026-09-25 10:13 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-25 10:13 Mukesh Ojha [this message]
2026-09-25 10:13 ` [PATCH 2/4] arm64: dts: qcom: hawi: Fix PCIe IOMMU maps Mukesh Ojha
2026-09-25 10:23 ` Konrad Dybcio
2026-09-25 10:13 ` [PATCH 3/4] arm64: dts: qcom: hawi: Enable SoCCP by default Mukesh Ojha
2026-09-25 10:19 ` Konrad Dybcio
2026-09-25 10:13 ` [PATCH 4/4] arm64: dts: qcom: hawi: Trivial fix Mukesh Ojha
2026-09-25 16:43 ` (subset) [PATCH 1/4] arm64: dts: qcom: hawi: Sort IPCC client IDs Bjorn Andersson
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