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Sat, 26 Sep 2026 04:14:17 -0700 (PDT) Received: from localhost.localdomain ([104.28.254.47]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2dfa60bfb1csm7247365ad.48.2026.09.26.04.14.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 26 Sep 2026 04:14:16 -0700 (PDT) From: Chuanhong Guo Date: Sat, 26 Sep 2026 19:13:59 +0800 Subject: [PATCH 1/3] dt-bindings: reset: mediatek: add MT7629 TOPRGU reset indices Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260926-b4-mt7629-toprgu-v1-1-c124bf9ac273@gmail.com> References: <20260926-b4-mt7629-toprgu-v1-0-c124bf9ac273@gmail.com> In-Reply-To: <20260926-b4-mt7629-toprgu-v1-0-c124bf9ac273@gmail.com> To: Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-watchdog@vger.kernel.org, Chuanhong Guo X-Mailer: b4 0.14.3 Define all seven reset IDs documented in the MT7629 TOPRGU SWSYSRST register: INFRA, ETHDMA, DDRPHY, INFRA_AO, CONN, APMIXED and CONN_MCU. Use their register bit positions as reset IDs. Signed-off-by: Chuanhong Guo --- include/dt-bindings/reset/mt7629-resets.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/dt-bindings/reset/mt7629-resets.h b/include/dt-bindings/reset/mt7629-resets.h index 6bb85734f68d..828919eee298 100644 --- a/include/dt-bindings/reset/mt7629-resets.h +++ b/include/dt-bindings/reset/mt7629-resets.h @@ -53,6 +53,15 @@ #define MT7629_PCIE0_USER_RST 30 #define MT7629_PCIE0_PIPE_RST 31 +/* TOPRGU resets */ +#define MT7629_TOPRGU_INFRA_SW_RST 0 +#define MT7629_TOPRGU_ETHDMA_SW_RST 1 +#define MT7629_TOPRGU_DDRPHY_SW_RST 6 +#define MT7629_TOPRGU_INFRA_AO_SW_RST 8 +#define MT7629_TOPRGU_CONN_SW_RST 9 +#define MT7629_TOPRGU_APMIXED_SW_RST 10 +#define MT7629_TOPRGU_CONN_MCU_SW_RST 12 + /* SSUSB Subsystem resets */ #define MT7629_SSUSB_PHY_PWR_RST 3 #define MT7629_SSUSB_MAC_PWR_RST 4 -- 2.55.0