From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CF49384CEE; Sun, 27 Sep 2026 14:00:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790517606; cv=none; b=XZIDja06hPD01qkTFWzaiBDYiKXxIjoRFDXRc9xvQsPZA0V1a5ObHSWKq/WOFBO0ymsCQxsVtzvI1rXEoZ16bkkVX+pX4i05jfEyYzKX3TZVYnnpDiEhiw9khhyuI7/0o1uScKwnnArCIpwArIw0W0zyBYhCocWC9A7KOOCv6PM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790517606; c=relaxed/simple; bh=i4xUTiesBfALH3lLZpBCBOyemy/rpCEK8TZJ/FnJoRE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gkISMDWzPC/Mc2mUcStcZhtPyOH+1AXtivBodONwY6vt4+mRJEmOn2bEBm1nNyOXkNy3n3WmCTonpWXlAF/qMzTJcBR3xUOLwok2uhKVk53/62C11Snx4xHzl49wcghLqYxiUP5u4QnmKOKStqiU5MbOBnz6vil3Gwf7/xBdobo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oiB+YEX5; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oiB+YEX5" Received: by smtp.kernel.org (Postfix) with ESMTPS id A7113C2BCF4; Sun, 27 Sep 2026 14:00:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1790517605; bh=i4xUTiesBfALH3lLZpBCBOyemy/rpCEK8TZJ/FnJoRE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=oiB+YEX5xCcR3HxY1rE66PmTH6hldMw8MvTddsh7rBStOss8Fa2NhsslFbUlB2+w8 q8x6ZECfLC3uTmS5O22YglN95A6dzL7x8XuCOQLPYhnjG3DIeay3DbF4TIfOFDL8GX dIzcZfVf6NVEkG0z9AUfgls5a1NsGVhfSlTQjJh3WJOxwKSmguKiLcZTeJrvHWXuG5 M0az1VncBONnWLyHbr0GxnijKx1VVl54RkfGewlxo+EYg4i8yg/KIy1vuqpzkDB4Ni uSjg2WbbFkHyteZWHACwIymsqFkmQntSQwd0xPqYoDNCBfK9SAN1jSrNenQMe5dyg4 RGcHOLOmbVpLg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88ED0C9832F; Sun, 27 Sep 2026 14:00:05 +0000 (UTC) From: Vyacheslav Yurkov via B4 Relay Date: Sun, 27 Sep 2026 14:00:01 +0000 Subject: [PATCH v7 2/2] clk: Add gpio-locked clock driver Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260927-feature-clock-guard-v7-2-8dd19568d9a2@bruker.com> References: <20260927-feature-clock-guard-v7-0-8dd19568d9a2@bruker.com> In-Reply-To: <20260927-feature-clock-guard-v7-0-8dd19568d9a2@bruker.com> To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Brian Masney , Brian Masney , Jerome Brunet , Jyri Sarha Cc: linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Vyacheslav Yurkov , Vyacheslav Yurkov X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790517604; l=4221; i=V.Yurkov.EXT@bruker.com; s=20260318; h=from:subject:message-id; bh=zcVM35pLLEJsaD3vvg5k9YlaPu6vWhe06tWgwilDuM8=; b=yROHKhD4w+4YZjzTF6f/hFwAtdK2HL3EKkmU9UrvM7ftxjJ41DkdX+nLJpFHDIOlwSj+8S4VI +uOENI82KuIAJoywl0ziAwy/Dq51Zw1SCaN88YrV1tbT/h5stqI+19b X-Developer-Key: i=V.Yurkov.EXT@bruker.com; a=ed25519; pk=snJmgYVOKlp7aQtK9tWnEI7QTYxpPpJJvxdVsnxA7Fk= X-Endpoint-Received: by B4 Relay for V.Yurkov.EXT@bruker.com/20260318 with auth_id=686 X-Original-From: Vyacheslav Yurkov Reply-To: V.Yurkov.EXT@bruker.com From: Vyacheslav Yurkov A gpio-locked clock exposes a clock, which status is determined by a GPIO signal. The common use-case is a FPGA-assisted clocking design where peripheral clocks are generated by FPGA PLLs that are outside CPU control, with clock-valid/PLL-lock status exposed through GPIO signals. Consumers can use the output clock to wait until the input clock is locked and only then initialize dependent peripherals. Signed-off-by: Vyacheslav Yurkov --- drivers/clk/clk-gpio.c | 44 +++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 41 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-gpio.c b/drivers/clk/clk-gpio.c index 9099c57e2715..a264ba21baf2 100644 --- a/drivers/clk/clk-gpio.c +++ b/drivers/clk/clk-gpio.c @@ -138,6 +138,19 @@ static const struct clk_ops clk_gpio_mux_ops = { .determine_rate = __clk_mux_determine_rate, }; +/* We can't prepare the clock, but the Common Clock Framework calls only + * prepare() not is_prepared(), therefore we fallback on the actuall GPIO value. + */ +static int clk_gpio_locked_prepare(struct clk_hw *hw) +{ + return clk_sleeping_gpio_gate_is_prepared(hw); +} + +static const struct clk_ops clk_gpio_locked_ops = { + .prepare = clk_gpio_locked_prepare, + .is_prepared = clk_sleeping_gpio_gate_is_prepared, +}; + static struct clk_hw *clk_register_gpio(struct device *dev, u8 num_parents, struct gpio_desc *gpiod, const struct clk_ops *clk_gpio_ops) @@ -146,6 +159,7 @@ static struct clk_hw *clk_register_gpio(struct device *dev, u8 num_parents, struct clk_hw *hw; struct clk_init_data init = {}; int err; + const char *clk_name; const struct clk_parent_data gpio_parent_data[] = { { .index = 0 }, { .index = 1 }, @@ -155,7 +169,11 @@ static struct clk_hw *clk_register_gpio(struct device *dev, u8 num_parents, if (!clk_gpio) return ERR_PTR(-ENOMEM); - init.name = dev->of_node->name; + err = device_property_read_string(dev, "clock-output-names", &clk_name); + if (err) + clk_name = fwnode_get_name(dev->fwnode); + + init.name = clk_name; init.ops = clk_gpio_ops; init.parent_data = gpio_parent_data; init.num_parents = num_parents; @@ -192,6 +210,12 @@ static struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, return clk_register_gpio(dev, 2, gpiod, &clk_gpio_mux_ops); } +static struct clk_hw *clk_hw_register_gpio_locked(struct device *dev, + struct gpio_desc *gpiod) +{ + return clk_register_gpio(dev, 1, gpiod, &clk_gpio_locked_ops); +} + static int gpio_clk_driver_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -201,8 +225,11 @@ static int gpio_clk_driver_probe(struct platform_device *pdev) struct gpio_desc *gpiod; struct clk_hw *hw; bool is_mux; + bool is_gpio_locked; + enum gpiod_flags gpio_flags; is_mux = of_device_is_compatible(node, "gpio-mux-clock"); + is_gpio_locked = of_device_is_compatible(node, "gpio-locked-clock"); num_parents = of_clk_get_parent_count(node); if (is_mux && num_parents != 2) { @@ -210,14 +237,24 @@ static int gpio_clk_driver_probe(struct platform_device *pdev) return -EINVAL; } - gpio_name = is_mux ? "select" : "enable"; - gpiod = devm_gpiod_get(dev, gpio_name, GPIOD_OUT_LOW); + if (is_mux) + gpio_name = "select"; + else if (is_gpio_locked) + gpio_name = "enabled"; + else + gpio_name = "enable"; + + gpio_flags = is_gpio_locked ? GPIOD_IN : GPIOD_OUT_LOW; + + gpiod = devm_gpiod_get(dev, gpio_name, gpio_flags); if (IS_ERR(gpiod)) return dev_err_probe(dev, PTR_ERR(gpiod), "Can't get '%s' named GPIO property\n", gpio_name); if (is_mux) hw = clk_hw_register_gpio_mux(dev, gpiod); + else if (is_gpio_locked) + hw = clk_hw_register_gpio_locked(dev, gpiod); else hw = clk_hw_register_gpio_gate(dev, num_parents, gpiod); if (IS_ERR(hw)) @@ -229,6 +266,7 @@ static int gpio_clk_driver_probe(struct platform_device *pdev) static const struct of_device_id gpio_clk_match_table[] = { { .compatible = "gpio-mux-clock" }, { .compatible = "gpio-gate-clock" }, + { .compatible = "gpio-locked-clock" }, { } }; -- 2.34.1