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Some platforms cannot deliver them with an external MSI controller either. The DesignWare core signals Root Port interrupts (AER, PME, bandwidth, hotplug) as sideband signals on its SII interface and only turns them into MSI writes with the optional SII2MSI feature. Otherwise it is up to the vendor wrapper. R-Car Gen4 (DWC 5.20a) appears to lack SII2MSI, and its APP block merely latches the signals into status registers wired to platform IRQs, so an MSI targeted at the GIC ITS is never sent. Add a no_rp_msi flag so glue drivers can request the same INTx fallback regardless of the MSI controller in use. It is the counterpart of 'keep_rp_msi_en' from commit 3a4e8302e72f ("PCI: imx6: Keep Root Port MSI capability with iMSI-RX to work around hardware bug"), which keeps precedence: that one is needed for endpoint MSIs to work at all, whereas hiding the capability only moves the Root Port services to INTx. The removal stays in dw_pcie_setup_rc(), which also runs after a Root Port reset. Signed-off-by: Koichiro Den --- Changes in v2: - No changes. drivers/pci/controller/dwc/pcie-designware-host.c | 6 ++++-- drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 31e15666479b..5b2f249490a7 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -1176,9 +1176,11 @@ int dw_pcie_setup_rc(struct dw_pcie_rp *pp) * The iMSI-RX module does not support receiving MSI or MSI-X generated * by the Root Port. If iMSI-RX is used as the MSI controller, remove * the MSI and MSI-X capabilities of the Root Port to allow the drivers - * to fall back to INTx instead. + * to fall back to INTx instead. Glue drivers set no_rp_msi when the + * platform never delivers the Root Port's own MSIs, whatever the MSI + * controller in use. */ - if (pp->use_imsi_rx && !pp->keep_rp_msi_en) { + if ((pp->use_imsi_rx || pp->no_rp_msi) && !pp->keep_rp_msi_en) { dw_pcie_remove_capability(pci, PCI_CAP_ID_MSI); dw_pcie_remove_capability(pci, PCI_CAP_ID_MSIX); } diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index a53ac27cd244..cf1b912bb396 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -444,6 +444,7 @@ struct dw_pcie_host_ops { struct dw_pcie_rp { bool use_imsi_rx:1; bool keep_rp_msi_en:1; + bool no_rp_msi:1; bool cfg0_io_shared:1; u64 cfg0_base; void __iomem *va_cfg0_base; -- 2.51.0