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From: Santhosh Kumar K <s-k6@ti.com>
To: <broonie@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
	<conor+dt@kernel.org>, <miquel.raynal@bootlin.com>,
	<richard@nod.at>, <vigneshr@ti.com>, <pratyush@kernel.org>,
	<mwalle@kernel.org>, <takahiro.kuwano@infineon.com>
Cc: <linux-spi@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-mtd@lists.infradead.org>,
	<praneeth@ti.com>, <sebin.francis@ti.com>, <u-kumar1@ti.com>,
	<a-dutta@ti.com>, <s-k6@ti.com>
Subject: [PATCH v10 13/19] spi: cadence-quadspi: reprogram CS timing on every chip-select switch
Date: Tue, 29 Sep 2026 12:05:23 +0530	[thread overview]
Message-ID: <20260929063529.1235417-14-s-k6@ti.com> (raw)
In-Reply-To: <20260929063529.1235417-1-s-k6@ti.com>

cqspi_configure() only reprogrammed per-device CS timing (CQSPI_REG_DELAY)
and the non-PHY read-capture register when the clock frequency changed, not
when the chip-select changed. In a multi-device setup where both devices
operate at the same frequency, a CS switch leaves the previous device's
timing parameters in hardware.

Split the update condition: baud rate divisor is updated on clock change
only (it is frequency-derived), but the per-device delay and read-capture
registers are now updated on any CS or clock switch.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
---
 drivers/spi/spi-cadence-quadspi.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 2752e7cce16c..10a393105ca1 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1621,8 +1621,9 @@ static void cqspi_configure(struct cqspi_flash_pdata *f_pdata,
 	struct cqspi_st *cqspi = f_pdata->cqspi;
 	int switch_cs = (cqspi->current_cs != f_pdata->cs);
 	int switch_ck = (cqspi->sclk != sclk);
+	bool reconfigure = switch_cs || switch_ck;
 
-	if (switch_cs || switch_ck)
+	if (reconfigure)
 		cqspi_controller_enable(cqspi, 0);
 
 	/* Switch chip select. */
@@ -1631,17 +1632,26 @@ static void cqspi_configure(struct cqspi_flash_pdata *f_pdata,
 		cqspi_chipselect(f_pdata);
 	}
 
-	/* Setup baudrate divisor and delays */
+	/* Update baudrate only on clock change. */
 	if (switch_ck) {
 		cqspi->sclk = sclk;
 		cqspi_config_baudrate_div(cqspi);
+	}
+
+	/*
+	 * Reprogram per-device CS timing and non-PHY read capture on any
+	 * chip-select or clock switch. Without this, two devices at the same
+	 * frequency would each see the other's timing parameters after a CS
+	 * switch, since the lazy clock-only check would never trigger.
+	 */
+	if (reconfigure) {
 		cqspi_delay(f_pdata);
 		if (!cqspi->phy_tuning_active)
 			cqspi_readdata_capture(cqspi, !cqspi->rclk_en, false,
 					       f_pdata->read_delay);
 	}
 
-	if (switch_cs || switch_ck)
+	if (reconfigure)
 		cqspi_controller_enable(cqspi, 1);
 }
 
-- 
2.34.1


  parent reply	other threads:[~2026-09-29  6:37 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-29  6:35 [PATCH v10 00/19] spi: cadence-quadspi: add PHY tuning support Santhosh Kumar K
2026-09-29  6:35 ` [PATCH v10 01/19] spi: dt-bindings: add spi-max-post-config-frequency-hz property Santhosh Kumar K
2026-09-29  6:35 ` [PATCH v10 02/19] spi: dt-bindings: add spi-phy-pattern-partition property Santhosh Kumar K
2026-09-29  6:35 ` [PATCH v10 03/19] spi: parse spi-max-post-config-frequency-hz into post_config_max_speed_hz Santhosh Kumar K
2026-09-29  6:48   ` sashiko-bot
2026-09-29  6:35 ` [PATCH v10 04/19] spi: spi-mem: teach spi_mem_adjust_op_freq() about post-config ops Santhosh Kumar K
2026-09-29  6:51   ` sashiko-bot
2026-09-29  6:35 ` [PATCH v10 05/19] spi: spi-mem: add execute_tuning callback and spi_mem_execute_tuning() Santhosh Kumar K
2026-09-29  6:35 ` [PATCH v10 06/19] spi: cadence-quadspi: move cqspi_readdata_capture earlier Santhosh Kumar K
2026-09-29  6:35 ` [PATCH v10 07/19] spi: cadence-quadspi: add DQS support to read data capture Santhosh Kumar K
2026-09-29  6:51   ` sashiko-bot
2026-09-29  6:35 ` [PATCH v10 08/19] spi: cadence-quadspi: add PHY tuning support Santhosh Kumar K
2026-09-29  6:57   ` sashiko-bot
2026-09-29  6:35 ` [PATCH v10 09/19] spi: cadence-quadspi: skip DDR PHY tuning for 2-byte-address ops (i2383) Santhosh Kumar K
2026-09-29  6:35 ` [PATCH v10 10/19] spi: cadence-quadspi: refactor direct read path for PHY support Santhosh Kumar K
2026-09-29  6:35 ` [PATCH v10 11/19] spi: cadence-quadspi: enable PHY for direct reads Santhosh Kumar K
2026-09-29  6:59   ` sashiko-bot
2026-09-29  6:35 ` [PATCH v10 12/19] spi: cadence-quadspi: enable PHY for indirect writes Santhosh Kumar K
2026-09-29  7:00   ` sashiko-bot
2026-09-29  6:35 ` Santhosh Kumar K [this message]
2026-09-29  6:35 ` [PATCH v10 14/19] spi: cadence-quadspi: reprogram PHY DLL on runtime resume Santhosh Kumar K
2026-09-29  6:35 ` [PATCH v10 15/19] mtd: spinand: extract variant ranking logic into spinand_op_find_best_variant() Santhosh Kumar K
2026-09-29  6:35 ` [PATCH v10 16/19] mtd: spinand: negotiate optimal controller operating point before dirmap creation Santhosh Kumar K
2026-09-29  6:35 ` [PATCH v10 17/19] mtd: spi-nor: extract read op template construction into helper Santhosh Kumar K
2026-09-29  6:35 ` [PATCH v10 18/19] mtd: spi-nor: run controller optimization before dirmap creation Santhosh Kumar K
2026-09-29  6:35 ` [PATCH v10 19/19] mtd: spi-nor: reset max_read_op frequency for security register reads Santhosh Kumar K

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