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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-14c64e7660asm200213c88.17.2026.09.29.08.53.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2026 08:54:00 -0700 (PDT) From: Shawn Guo To: Bjorn Andersson Cc: Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Dhruvin Rajpura , Anandu Krishnan E , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dhruvin Rajpura , Konrad Dybcio , Abel Vesa , Shawn Guo Subject: [PATCH v4 5/7] arm64: dts: qcom: nord: Add PMAU0102 and PMM8650AU PMIC support Date: Tue, 29 Sep 2026 23:51:50 +0800 Message-ID: <20260929155152.1898666-6-shengchao.guo@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260929155152.1898666-1-shengchao.guo@oss.qualcomm.com> References: <20260929155152.1898666-1-shengchao.guo@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: M092CqlYtoOR4aoKSB3anw_kB80xv8X8 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI5MDA2MyBTYWx0ZWRfXyZKz6H2lHbE6 iln/rrfl+2UoMsre3KFX4O64ytMWO96DGVyHAje+Oc9nAhaNazHswuBTtWhlKVvsWGQqw08QnsS sJcWwOeLrezXa05zryLUYphIOqlUdEhKTCMq2BwLdf5LTfwzmcuR5NkOBPxeJJ6m0/8XHbVQZAJ snc8EPhJZIgCC7BURSy6qWdNmZQ9z/eWIZJkRh+XsRfEIGn2QByHLtw7/IvEkFTKp7AUXKPzS8Y mCkwP7vsByDkRXRc7u72YawSBa49Tq0horkxVjHJrXzx1HKRSPjm6P/OZE2dgx4cW0LjvhoaSsx U2oeLHq8TNzzb0MVh6yv+1WpeEMoSupHVdEVEyY9KoCTTThe0vXOY3gD6rf3PGoOmz3dni84oBN XQC5OiN+BtmfBPxCPS5fKnur2P+HhEvvJt5/hejA8M0PMZJ4S5giyH5Dn6LBZsO1nQn4tuOLsnq jL4BafEJ9/5oySwvqtA== X-Authority-Analysis: v=2.4 cv=cokOAF4i c=1 sm=1 tr=0 ts=6abbdf1a cx=c_pps a=kVLUcbK0zfr7ocalXnG1qA==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=hucZloQI8G6bWT6_XmMA:9 a=U2nuDi6JAHPDsfF0:21 a=vr4QvYf-bLy2KjpDp97w:22 X-Proofpoint-ORIG-GUID: M092CqlYtoOR4aoKSB3anw_kB80xv8X8 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI5MDA2MyBTYWx0ZWRfX9zNVVON5X6a8 tGSkMR+H9k76AVCOte+Nfp8w+9uxnM55zHdd1ZM/HHCdhbv97O9/uPbR0Jti3FS0H6iZAWRVAuU 00mmP/5mlSlI87c4chI1FfX/95SN9p0= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-29_04,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 adultscore=0 malwarescore=0 suspectscore=0 phishscore=0 impostorscore=0 bulkscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609290063 From: Dhruvin Rajpura The Nord platform is supplied by two families of PMICs on the SPMI bus: eight PMAU0102 devices on USIDs 4 to 11, and one PMM8650AU on USID 0. Add one dtsi per PMIC type, following the established one-file-per-PMIC convention, and include both of them from nord-rrd.dts. The eight PMAU0102 instances are labelled pmau0102_e through pmau0102_l after their board designators. Each one provides a GPIO controller, an ADC, and an MBG (Master Bandgap) temperature monitor that reads its die temperature through a DIE_TEMP ADC channel. The monitors use the qcom,pmau0102-mbg-tm compatible with qcom,pm8775-mbg-tm as fallback, and each is hooked up to a thermal zone. PMM8650AU is the same die as PMM8654AU, so pmm8650au_a reuses the existing pmm8654au ompatibles while the file is named after the part actually populated on the board. It provides PON with a power key, a RTC, and a GPIO controller. The resin is described but left disabled, for boards that wire it up to enable. Signed-off-by: Dhruvin Rajpura Acked-by: Konrad Dybcio Reviewed-by: Abel Vesa Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/qcom/nord-rrd.dts | 2 + arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi | 543 +++++++++++++++++++ arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi | 54 ++ 3 files changed, 599 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi create mode 100644 arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi diff --git a/arch/arm64/boot/dts/qcom/nord-rrd.dts b/arch/arm64/boot/dts/qcom/nord-rrd.dts index 0b0acd33a2e1..47978df0af92 100644 --- a/arch/arm64/boot/dts/qcom/nord-rrd.dts +++ b/arch/arm64/boot/dts/qcom/nord-rrd.dts @@ -9,6 +9,8 @@ #include #include "nord-embedded.dtsi" +#include "pmau0102-nord.dtsi" +#include "pmm8650au-nord.dtsi" / { model = "Qualcomm Technologies, Inc. IQ10 RRD"; diff --git a/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi new file mode 100644 index 000000000000..47ea145f4abb --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi @@ -0,0 +1,543 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include + +#include "qcom-adc5-gen3.h" + +&spmi_bus { + pmau0102_e: pmic@4 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_e_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x4 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_e_adc ADC5_GEN3_DIE_TEMP(4)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_e_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x4 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@400 { + reg = ; + label = "pmau0102_e_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@401 { + reg = ; + label = "pmau0102_e_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@403 { + reg = ; + label = "pmau0102_e_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_e_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_e_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_f: pmic@5 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_f_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x5 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_f_adc ADC5_GEN3_DIE_TEMP(5)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_f_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x5 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@500 { + reg = ; + label = "pmau0102_f_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@501 { + reg = ; + label = "pmau0102_f_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@503 { + reg = ; + label = "pmau0102_f_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_f_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_f_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_g: pmic@6 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x6 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_g_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x6 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_g_adc ADC5_GEN3_DIE_TEMP(6)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_g_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x6 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@600 { + reg = ; + label = "pmau0102_g_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@601 { + reg = ; + label = "pmau0102_g_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@603 { + reg = ; + label = "pmau0102_g_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_g_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_g_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_h: pmic@7 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x7 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_h_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x7 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_h_adc ADC5_GEN3_DIE_TEMP(7)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_h_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x7 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@700 { + reg = ; + label = "pmau0102_h_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@701 { + reg = ; + label = "pmau0102_h_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@703 { + reg = ; + label = "pmau0102_h_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_h_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_h_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_i: pmic@8 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x8 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_i_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x8 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_i_adc ADC5_GEN3_DIE_TEMP(8)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_i_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x8 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@800 { + reg = ; + label = "pmau0102_i_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@801 { + reg = ; + label = "pmau0102_i_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@803 { + reg = ; + label = "pmau0102_i_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_i_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_i_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_j: pmic@9 { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0x9 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_j_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0x9 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_j_adc ADC5_GEN3_DIE_TEMP(9)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_j_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0x9 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@900 { + reg = ; + label = "pmau0102_j_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@901 { + reg = ; + label = "pmau0102_j_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@903 { + reg = ; + label = "pmau0102_j_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_j_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_j_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_k: pmic@a { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0xa SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_k_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0xa 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_k_adc ADC5_GEN3_DIE_TEMP(0xa)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_k_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0xa 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@a00 { + reg = ; + label = "pmau0102_k_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@a01 { + reg = ; + label = "pmau0102_k_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@a03 { + reg = ; + label = "pmau0102_k_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_k_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_k_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmau0102_l: pmic@b { + compatible = "qcom,pmau0102", "qcom,spmi-pmic"; + reg = <0xb SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmau0102_l_mbg_temp: temperature-sensor@d700 { + compatible = "qcom,pmau0102-mbg-tm", "qcom,pm8775-mbg-tm"; + reg = <0xd700>; + interrupts-extended = <&spmi_bus 0xb 0xd7 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pmau0102_l_adc ADC5_GEN3_DIE_TEMP(0xb)>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmau0102_l_adc: adc@7200 { + compatible = "qcom,spmi-adc5-gen3"; + reg = <0x7200>; + #address-cells = <1>; + #size-cells = <0>; + interrupts-extended = <&spmi_bus 0xb 0x72 0x1 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + + channel@b00 { + reg = ; + label = "pmau0102_l_ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + channel@b01 { + reg = ; + label = "pmau0102_l_vref_1p25"; + qcom,pre-scaling = <1 1>; + }; + + channel@b03 { + reg = ; + label = "pmau0102_l_die_temp"; + qcom,pre-scaling = <1 1>; + }; + }; + + pmau0102_l_gpios: gpio@8800 { + compatible = "qcom,pmau0102-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmau0102_l_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +/ { + thermal-zones { + pmau0102_e_thermal: pmau0102-e-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_e_mbg_temp>; + + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_f_thermal: pmau0102-f-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_f_mbg_temp>; + + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_g_thermal: pmau0102-g-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_g_mbg_temp>; + + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_h_thermal: pmau0102-h-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_h_mbg_temp>; + + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_i_thermal: pmau0102-i-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_i_mbg_temp>; + + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_j_thermal: pmau0102-j-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_j_mbg_temp>; + + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_k_thermal: pmau0102-k-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_k_mbg_temp>; + + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + + pmau0102_l_thermal: pmau0102-l-thermal { + polling-delay-passive = <100>; + thermal-sensors = <&pmau0102_l_mbg_temp>; + + trips { + trip0 { + temperature = <115000>; + hysteresis = <5000>; + type = "passive"; + }; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi b/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi new file mode 100644 index 000000000000..1282e5bae591 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmm8650au-nord.dtsi @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include + +&spmi_bus { + pmm8650au_a: pmic@0 { + compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmm8650au_a_pon: pon@1200 { + compatible = "qcom,pmm8654au-pon", "qcom,pmk8350-pon"; + reg = <0x1200>, <0x800>; + reg-names = "hlos", "pbs"; + + pmm8650au_a_pon_pwrkey: pwrkey { + compatible = "qcom,pmm8654au-pwrkey", "qcom,pmk8350-pwrkey"; + interrupts-extended = <&spmi_bus 0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + debounce = <15625>; + }; + + pmm8650au_a_pon_resin: resin { + compatible = "qcom,pmm8654au-resin", "qcom,pmk8350-resin"; + interrupts-extended = <&spmi_bus 0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + status = "disabled"; + }; + }; + + pmm8650au_a_rtc: rtc@6100 { + compatible = "qcom,pmm8654au-rtc", "qcom,pmk8350-rtc"; + reg = <0x6100>, <0x6200>; + reg-names = "rtc", "alarm"; + interrupts-extended = <&spmi_bus 0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + }; + + pmm8650au_a_gpios: gpio@8800 { + compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmm8650au_a_gpios 0 0 12>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; -- 2.43.0