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Wed, 30 Sep 2026 09:41:44 +0200 From: Patrice Chotard Date: Wed, 30 Sep 2026 09:41:42 +0200 Subject: [PATCH v2 1/3] dt-bindings: nvmem: add STM32MPX TAMP backup registers Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20260930-upstream_nvram_reworked-v2-1-cfda749ee0b7@foss.st.com> References: <20260930-upstream_nvram_reworked-v2-0-cfda749ee0b7@foss.st.com> In-Reply-To: <20260930-upstream_nvram_reworked-v2-0-cfda749ee0b7@foss.st.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Christophe Roullier , Srinivas Kandagatla CC: Simeon Marijon , , , , , Patrice Chotard X-Mailer: b4 0.16.0 X-ClientProxiedBy: STKCAS1NODE1.st.com (10.75.128.134) To STKDAG1NODE1.st.com (10.75.128.132) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU6PEPF0000A7DD:EE_|AS2PR10MB7575:EE_ X-MS-Office365-Filtering-Correlation-Id: e63c23de-5f27-4fad-6651-08df1ec64730 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|376014|1800799024|36860700016|82310400026|18002099003|22082099003|13003099007|3023799007|10067099003|56012099006|11063799006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: wxYr92qkWjWYoXiFHJmxjrCMHis9T5aWDPIM0rniXsYr7cG8huXkbqvt4BjAJ0iMsnslhYTzqIcwGXN4oM7tCBaEXkx3PHsiklcm4gigjb+6MKzfF1C9XR7Ri+Qg38Zm6r7HfgSFhPUpuOmXAF9WuMX/gK8RSeUwcWXvr6+EH/hhqIcT79I9ZWKeHqLndskO3zEe64sfWXRfucHk+WBueVaz+2W4PJ4ztidKMNhi/ul7cTSzotrwad2UDDQQ3L5NT/SSljFt0/CP5R3W/x7m8Kz67UrCUBKc8KkHzQ7svkk/xDPPtU6uzP5F0JjWswuGMjGCIL5B+OyKBl9oRnaUGh/BCpSnJ4C8uKVhBVYWjcqAecYzIuV7JdaeKDojqmqjejP/OvRQ7yIjZn7GQ758yx03pyyo4ks8HvISdtnRtLDrHOVTsIZfegRJ1WZ6Rv5b X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Sep 2026 07:41:45.5390 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e63c23de-5f27-4fad-6651-08df1ec64730 X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.60];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: DU6PEPF0000A7DD.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR10MB7575 From: Simeon Marijon Adds the binding documentation for TAMP backup registers. The backup registers is a part of the TAMP device of STM32 MPU. Signed-off-by: Simeon Marijon Reviewed-by: Rob Herring (Arm) Signed-off-by: Patrice Chotard --- .../bindings/nvmem/st,stm32-tamp-nvram.yaml | 57 ++++++++++++++++++++++ MAINTAINERS | 7 +++ 2 files changed, 64 insertions(+) diff --git a/Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml b/Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml new file mode 100644 index 000000000000..4af3b88db566 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/st,stm32-tamp-nvram.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 backup registers as NVMEM + +description: | + This represents STM32 backup registers area presented as nvmem cells. + This contains various information (e.g. boot mode passed to bootloaders). + +maintainers: + - Simeon Marijon + - Patrice Chotard + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + enum: + - st,stm32mp15-tamp-nvram + - st,stm32mp25-tamp-nvram + + reg: + description: + TAMP Registers bank location and size. + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + nvram: nvram@5c00a100 { + reg = <0x5c00a100 0x80>; + compatible = "st,stm32mp15-tamp-nvram"; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + /* Data cells */ + wakeup_sec: tamp-bkp@0 { + reg = <0x0 0x4>; + }; + boot_mode: tamp-bkp@50 { + /*see boot mode selection feature*/ + reg = <0x50 0x4>; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 3a19da74d00c..b634c037c229 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -26261,6 +26261,13 @@ F: Documentation/arch/arm/stm32/stm32-dma-mdma-chaining.rst F: Documentation/devicetree/bindings/dma/stm32/ F: drivers/dma/stm32/ +STM32 TAMP DRIVERS +M: Simeon Marijon +M: Patrice Chotard +L: linux-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers) +S: Maintained +F: Documentation/devicetree/bindings/nvmem/st,stm32-tamp-nvram.yaml + STM32 TIMER/LPTIMER DRIVERS M: Fabrice Gasnier S: Maintained -- 2.43.0