From: Patrice Chotard <patrice.chotard@foss.st.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Christophe Roullier <christophe.roullier@foss.st.com>,
Srinivas Kandagatla <srini@kernel.org>
Cc: Simeon Marijon <simeon.marijon@foss.st.com>,
<linux-stm32@st-md-mailman.stormreply.com>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
Patrice Chotard <patrice.chotard@foss.st.com>
Subject: [PATCH v2 2/3] dt-bindings: arm: stm32: allow TAMP nvram child node for syscon
Date: Wed, 30 Sep 2026 09:41:43 +0200 [thread overview]
Message-ID: <20260930-upstream_nvram_reworked-v2-2-cfda749ee0b7@foss.st.com> (raw)
In-Reply-To: <20260930-upstream_nvram_reworked-v2-0-cfda749ee0b7@foss.st.com>
The STM32 TAMP node (compatible "st,stm32-tamp", "syscon", "simple-mfd")
exposes its backup registers through an nvram child node described by
nvmem/st,stm32-tamp-nvram.yaml. That requires the TAMP node to carry
"#address-cells", "#size-cells", "ranges" and an "nvram@..." child.
st,stm32-syscon.yaml uses "additionalProperties: false" and only allowed
reg/clocks/#clock-cells, so wiring the nvram provider into the DTSI made
"make dtbs_check" fail on every STM32MP TAMP node:
tamp@5c00a000 (st,stm32-tamp): '#address-cells', '#size-cells',
'nvram@5c00a100', 'ranges' do not match any of the regexes:
'^pinctrl-[0-9]+$'
Allow the addressing properties and the nvram child, gated on the
st,stm32-tamp compatible so the other syscon variants stay strict.
"#size-cells" may be 1 or 2: the STM32MP21 soc bus uses two size cells
(an empty "ranges" requires the node to match its parent) while the
other STM32MP SoCs use one.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
.../bindings/arm/stm32/st,stm32-syscon.yaml | 30 ++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
index 95d2319afe23..1aeb54867db2 100644
--- a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
+++ b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
@@ -39,6 +39,23 @@ properties:
"#clock-cells":
const: 0
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ enum: [1, 2]
+
+ ranges: true
+
+patternProperties:
+ "^nvram@[0-9a-f]+$":
+ type: object
+ description:
+ TAMP backup registers exposed as an NVMEM provider. See
+ nvmem/st,stm32-tamp-nvram.yaml.
+ required:
+ - compatible
+
required:
- compatible
- reg
@@ -61,6 +78,19 @@ allOf:
then:
required:
- "#clock-cells"
+ - if:
+ not:
+ properties:
+ compatible:
+ contains:
+ const: st,stm32-tamp
+ then:
+ properties:
+ "#address-cells": false
+ "#size-cells": false
+ ranges: false
+ patternProperties:
+ "^nvram@[0-9a-f]+$": false
additionalProperties: false
--
2.43.0
next prev parent reply other threads:[~2026-09-30 7:41 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-30 7:41 [PATCH v2 0/3] Add STM32 TAMP nvram driver support Patrice Chotard
2026-09-30 7:41 ` [PATCH v2 1/3] dt-bindings: nvmem: add STM32MPX TAMP backup registers Patrice Chotard
2026-09-30 7:41 ` Patrice Chotard [this message]
2026-09-30 7:41 ` [PATCH v2 3/3] nvmem: stm32: add TAMP nvmem driver Patrice Chotard
2026-09-30 7:53 ` sashiko-bot
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