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Wed, 30 Sep 2026 00:05:54 -0700 (PDT) Received: from xeon ([188.163.112.76]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48b029f5bcdsm1145150f8f.27.2026.09.30.00.05.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Sep 2026 00:05:54 -0700 (PDT) From: Svyatoslav Ryhel To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Mikko Perttunen , Svyatoslav Ryhel Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 0/6] drm/tegra: Add support for Tegra20/Tegra30 8-bit CPU interface Date: Wed, 30 Sep 2026 10:05:29 +0300 Message-ID: <20260930070535.47130-1-clamor95@gmail.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The display controller in Tegra20/30 SoCs features an 8-bit SPI interface that closely resembles the MIPI DBI Type B protocol and is referred to as '8-bit CPU'. Add DC parametrization options needed for fine tuning by bridges. Add 8-bit CPU interface in form of a bridge linking to RGB port. Add 2 DBI Type B panels used in LG Optimus 2X which work with the 8-bit CPU interface. Svyatoslav Ryhel (6): drm/tegra: dc: Expand available registers layouts drm/tegra: rgb: Parameterize configuration based on bus flags dt-bindings: display: tegra: Document 8-bit CPU parallel interface drm/tegra: Add support for 8-bit CPU interface dt-bindings: display: panel: Document Hitachi TX10D07VM0BAA and LG LH400WV3 panels drm/panel: Add Hitachi TX10D07VM0BAA and LG LH400WV3-SD04 MIPI DBI panel driver .../display/panel/hit,tx10d07vm0baa.yaml | 55 +++ .../display/tegra/nvidia,tegra-8bit-cpu.yaml | 138 ++++++ drivers/gpu/drm/panel/Kconfig | 14 + drivers/gpu/drm/panel/Makefile | 1 + .../drm/panel/panel-hitachi-tx10d07vm0baa.c | 396 ++++++++++++++++ drivers/gpu/drm/tegra/Kconfig | 7 + drivers/gpu/drm/tegra/Makefile | 1 + drivers/gpu/drm/tegra/cpu-bridge.c | 427 ++++++++++++++++++ drivers/gpu/drm/tegra/dc.c | 3 +- drivers/gpu/drm/tegra/dc.h | 54 ++- drivers/gpu/drm/tegra/rgb.c | 36 +- 11 files changed, 1121 insertions(+), 11 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/panel/hit,tx10d07vm0baa.yaml create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra-8bit-cpu.yaml create mode 100644 drivers/gpu/drm/panel/panel-hitachi-tx10d07vm0baa.c create mode 100644 drivers/gpu/drm/tegra/cpu-bridge.c -- 2.53.0