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[61.220.246.151]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-887253992a9sm650257b3a.17.2026.09.30.04.19.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Sep 2026 04:19:10 -0700 (PDT) From: Cosmo Chou To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joel@jms.id.au, andrew@codeconstruct.com.au Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, cosmo.chou@quantatw.com, Cosmo Chou Subject: [PATCH v3 4/4] ARM: dts: aspeed: bletchley: Add second source ISL1208 RTC Date: Wed, 30 Sep 2026 19:18:13 +0800 Message-ID: <20260930111813.52396-5-chou.cosmo@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260930111813.52396-1-chou.cosmo@gmail.com> References: <20260930111813.52396-1-chou.cosmo@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add alternative ISL1208 RTC at address 0x6f to support boards populated with the ISL1208 instead of the primary PCF85263 at 0x51. Signed-off-by: Cosmo Chou --- arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts index 1883bfb850fb..76b7117344de 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts @@ -1269,6 +1269,11 @@ eeprom@56 { compatible = "atmel,24c64"; reg = <0x56>; }; + + rtc@6f { + compatible = "isil,isl1208"; + reg = <0x6f>; + }; }; &i2c7 { -- 2.43.0