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Wed, 30 Sep 2026 19:24:48 -0700 (PDT) Received: from archlinux ([212.192.12.80]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a4f43a12c9sm2153230a91.2.2026.09.30.19.24.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Sep 2026 19:24:47 -0700 (PDT) From: Mikhail Kalashnikov To: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Andre Przywara Subject: [PATCH v2 3/4] arm64: dts: allwinner: sun55i-a523: add I2C0 and I2C1 pin groups Date: Thu, 1 Oct 2026 10:24:14 +0800 Message-ID: <20261001022415.913959-4-iuncuim@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261001022415.913959-1-iuncuim@gmail.com> References: <20261001022415.913959-1-iuncuim@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add the pin groups for the I2C0 (PH0/PH1) and I2C1 (PH2/PH3) controllers that used on some A523 boards. Assisted-by: OpenCode:DeepSeek-V4.1-Flash Reviewed-by: Andre Przywara Signed-off-by: Mikhail Kalashnikov --- arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi index 85ef492ff..0ec5d19f7 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -147,6 +147,24 @@ pio: pinctrl@2000000 { interrupt-controller; #interrupt-cells = <3>; + /omit-if-no-ref/ + i2c0_pins: i2c0-pins { + pins = "PH0", "PH1"; + function = "i2c0"; + allwinner,pinmux = <2>; + drive-strength = <10>; + bias-pull-up; + }; + + /omit-if-no-ref/ + i2c1_pins: i2c1-pins { + pins = "PH2", "PH3"; + function = "i2c1"; + allwinner,pinmux = <2>; + drive-strength = <10>; + bias-pull-up; + }; + /omit-if-no-ref/ i2s2_pi_pins: i2s2-pi-pins { pins = "PI2", "PI3", "PI4", "PI5"; -- 2.55.0